1// -*- mode:c++ -*- 2 |
3// Copyright (c) 2010, 2012-2013 ARM Limited |
4// All rights reserved 5// 6// The license below extends only to copyright in the software and shall 7// not be construed as granting a license to any other intellectual 8// property including but not limited to intellectual property relating 9// to a hardware implementation of the functionality of the software 10// licensed hereunder. You may use the software subject to the license 11// terms below provided that you ensure that this notice is replicated --- 84 unchanged lines hidden (view full) --- 96}}; 97 98def format Thumb16CondBranchAndSvc() {{ 99 decode_block = ''' 100 if (bits(machInst, 11, 9) != 0x7) { 101 return new B(machInst, sext<9>(bits(machInst, 7, 0) << 1), 102 (ConditionCode)(uint32_t)bits(machInst, 11, 8)); 103 } else if (bits(machInst, 8)) { |
104 return new Svc(machInst, bits(machInst, 7, 0)); |
105 } else { 106 // This space will not be allocated in the future. 107 return new Unknown(machInst); 108 } 109 ''' 110}}; 111 112def format Thumb16UncondBranch() {{ --- 9 unchanged lines hidden (view full) --- 122 const uint32_t op1 = bits(machInst, 14, 12); 123 switch (op1 & 0x5) { 124 case 0x0: 125 if (op == 127) { 126 if (op1 & 0x2) { 127 // Permanently undefined. 128 return new Unknown(machInst); 129 } else { |
130 return new Smc(machInst); |
131 } 132 } else if ((op & 0x38) != 0x38) { 133 const uint32_t s = bits(machInst, 26); 134 const uint32_t j1 = bits(machInst, 13); 135 const uint32_t j2 = bits(machInst, 11); 136 const uint32_t imm6 = bits(machInst, 21, 16); 137 const uint32_t imm11 = bits(machInst, 10, 0); 138 const int32_t imm = sext<21>((s << 20) | 139 (j2 << 19) | (j1 << 18) | 140 (imm6 << 12) | (imm11 << 1)); 141 return new B(machInst, imm, 142 (ConditionCode)(uint32_t)bits(machInst, 25, 22)); 143 } else { |
144 // HIGH: 12-11=10, LOW: 15-14=00, 12=0 |
145 switch (op) { 146 case 0x38: |
147 case 0x39: 148 { 149 const IntRegIndex rn = 150 (IntRegIndex)(uint32_t)bits(machInst, 19, 16); 151 const uint8_t byteMask = bits(machInst, 11, 8); |
152 const bool r = bits(machInst, 20); 153 if (bits(machInst, 5)) { 154 const uint8_t sysM = (bits(machInst, 4) << 4) | 155 byteMask; 156 return new MsrBankedReg(machInst, rn, sysM, r); 157 } else { 158 if (r) { 159 return new MsrSpsrReg(machInst, rn, byteMask); 160 } else { 161 return new MsrCpsrReg(machInst, rn, byteMask); 162 } 163 } |
164 } 165 case 0x3a: 166 { 167 const uint32_t op1 = bits(machInst, 10, 8); 168 const uint32_t op2 = bits(machInst, 7, 0); 169 if (op1 != 0) { 170 const bool enable = bits(machInst, 10, 9) == 0x2; 171 const uint32_t mods = bits(machInst, 8, 0) | --- 25 unchanged lines hidden (view full) --- 197 switch (op) { 198 case 0x0: 199 return new Leavex(machInst); 200 case 0x1: 201 return new Enterx(machInst); 202 case 0x2: 203 return new Clrex(machInst); 204 case 0x4: |
205 return new Dsb(machInst, 0); |
206 case 0x5: |
207 return new Dmb(machInst, 0); |
208 case 0x6: |
209 return new Isb(machInst, 0); |
210 default: 211 break; 212 } 213 break; 214 } 215 case 0x3c: 216 { |
217 return new BxjReg(machInst, |
218 (IntRegIndex)(uint32_t)bits(machInst, 19, 16), 219 COND_UC); 220 } 221 case 0x3d: 222 { 223 const uint32_t imm32 = bits(machInst, 7, 0); |
224 if (imm32 == 0) { 225 return new Eret(machInst); 226 } else { 227 return new SubsImmPclr(machInst, INTREG_PC, 228 INTREG_LR, imm32, false); 229 } |
230 } 231 case 0x3e: |
232 case 0x3f: |
233 { |
234 |
235 const IntRegIndex rd = 236 (IntRegIndex)(uint32_t)bits(machInst, 11, 8); |
237 const bool r = bits(machInst, 20); 238 if (bits(machInst, 5)) { 239 const uint8_t sysM = (bits(machInst, 4) << 4) | 240 bits(machInst, 11, 8); 241 return new MrsBankedReg(machInst, rd, sysM, r); 242 } else { 243 if (r) { 244 return new MrsSpsr(machInst, rd); 245 } else { 246 return new MrsCpsr(machInst, rd); 247 } 248 } |
249 } |
250 case 0xfe: |
251 { |
252 uint32_t imm16 = (bits(machInst, 19, 16) << 12) | 253 (bits(machInst, 11, 0) << 0); 254 return new Hvc(machInst, imm16); |
255 } 256 } 257 break; 258 } 259 case 0x1: 260 { 261 const uint32_t s = bits(machInst, 26); 262 const uint32_t i1 = !(bits(machInst, 13) ^ s); --- 42 unchanged lines hidden --- |