1// -*- mode:c++ -*- 2 3// Copyright (c) 2010 ARM Limited 4// All rights reserved 5// 6// The license below extends only to copyright in the software and shall 7// not be construed as granting a license to any other intellectual 8// property including but not limited to intellectual property relating --- 36 unchanged lines hidden (view full) --- 45// Control transfer instructions 46// 47 48def format ArmBBlxImm() {{ 49 decode_block = ''' 50 if (machInst.condCode == 0xF) { 51 int32_t imm = (sext<26>(bits(machInst, 23, 0) << 2)) | 52 (bits(machInst, 24) << 1); |
53 return new BlxImm(machInst, imm, COND_UC); |
54 } else { 55 return new B(machInst, sext<26>(bits(machInst, 23, 0) << 2), 56 (ConditionCode)(uint32_t)machInst.condCode); 57 } 58 ''' 59}}; 60 61def format ArmBlBlxImm() {{ 62 decode_block = ''' 63 if (machInst.condCode == 0xF) { 64 int32_t imm = (sext<26>(bits(machInst, 23, 0) << 2)) | 65 (bits(machInst, 24) << 1); |
66 return new BlxImm(machInst, imm, COND_UC); |
67 } else { 68 return new Bl(machInst, sext<26>(bits(machInst, 23, 0) << 2), 69 (ConditionCode)(uint32_t)machInst.condCode); 70 } 71 ''' 72}}; 73 74def format ArmBxClz() {{ --- 156 unchanged lines hidden (view full) --- 231 (IntRegIndex)(uint32_t)bits(machInst, 11, 8); 232 return new MrsSpsr(machInst, rd); 233 } 234 } 235 break; 236 } 237 case 0x1: 238 { |
239 ConditionCode condCode; 240 if(machInst.itstateMask) { 241 condCode = (ConditionCode)(uint8_t)machInst.itstateCond; 242 } else { 243 condCode = COND_UC; 244 } 245 |
246 const uint32_t s = bits(machInst, 26); 247 const uint32_t i1 = !(bits(machInst, 13) ^ s); 248 const uint32_t i2 = !(bits(machInst, 11) ^ s); 249 const uint32_t imm10 = bits(machInst, 25, 16); 250 const uint32_t imm11 = bits(machInst, 10, 0); 251 const int32_t imm = sext<25>((s << 24) | 252 (i1 << 23) | (i2 << 22) | 253 (imm10 << 12) | (imm11 << 1)); |
254 return new B(machInst, imm, condCode); |
255 } 256 case 0x4: 257 { 258 if (bits(machInst, 0) == 1) { 259 return new Unknown(machInst); 260 } |
261 ConditionCode condCode; 262 if(machInst.itstateMask) { 263 condCode = (ConditionCode)(uint8_t)machInst.itstateCond; 264 } else { 265 condCode = COND_UC; 266 } |
267 const uint32_t s = bits(machInst, 26); 268 const uint32_t i1 = !(bits(machInst, 13) ^ s); 269 const uint32_t i2 = !(bits(machInst, 11) ^ s); 270 const uint32_t imm10h = bits(machInst, 25, 16); 271 const uint32_t imm10l = bits(machInst, 10, 1); 272 const int32_t imm = sext<25>((s << 24) | 273 (i1 << 23) | (i2 << 22) | 274 (imm10h << 12) | (imm10l << 2)); |
275 return new BlxImm(machInst, imm, condCode); |
276 } 277 case 0x5: 278 { |
279 ConditionCode condCode; 280 if(machInst.itstateMask) { 281 condCode = (ConditionCode)(uint8_t)machInst.itstateCond; 282 } else { 283 condCode = COND_UC; 284 } |
285 const uint32_t s = bits(machInst, 26); 286 const uint32_t i1 = !(bits(machInst, 13) ^ s); 287 const uint32_t i2 = !(bits(machInst, 11) ^ s); 288 const uint32_t imm10 = bits(machInst, 25, 16); 289 const uint32_t imm11 = bits(machInst, 10, 0); 290 const int32_t imm = sext<25>((s << 24) | 291 (i1 << 23) | (i2 << 22) | 292 (imm10 << 12) | (imm11 << 1)); |
293 return new Bl(machInst, imm, condCode); |
294 } 295 default: 296 break; 297 } 298 return new Unknown(machInst); 299 } 300 ''' 301}}; |