3c3
< // Copyright (c) 2010 ARM Limited
---
> // Copyright (c) 2010, 2012-2013 ARM Limited
104c104
< return new Svc(machInst);
---
> return new Svc(machInst, bits(machInst, 7, 0));
130c130
< return new WarnUnimplemented("smc", machInst);
---
> return new Smc(machInst);
143a144
> // HIGH: 12-11=10, LOW: 15-14=00, 12=0
146,151d146
< {
< const IntRegIndex rn =
< (IntRegIndex)(uint32_t)bits(machInst, 19, 16);
< const uint8_t byteMask = bits(machInst, 11, 8);
< return new MsrCpsrReg(machInst, rn, byteMask);
< }
157c152,163
< return new MsrSpsrReg(machInst, rn, byteMask);
---
> const bool r = bits(machInst, 20);
> if (bits(machInst, 5)) {
> const uint8_t sysM = (bits(machInst, 4) << 4) |
> byteMask;
> return new MsrBankedReg(machInst, rn, sysM, r);
> } else {
> if (r) {
> return new MsrSpsrReg(machInst, rn, byteMask);
> } else {
> return new MsrCpsrReg(machInst, rn, byteMask);
> }
> }
199c205
< return new Dsb(machInst);
---
> return new Dsb(machInst, 0);
201c207
< return new Dmb(machInst);
---
> return new Dmb(machInst, 0);
203c209
< return new Isb(machInst);
---
> return new Isb(machInst, 0);
211,212c217
< // On systems that don't support bxj, bxj == bx
< return new BxReg(machInst,
---
> return new BxjReg(machInst,
219,220c224,229
< return new SubsImmPclr(machInst, INTREG_PC, INTREG_LR,
< imm32, false);
---
> if (imm32 == 0) {
> return new Eret(machInst);
> } else {
> return new SubsImmPclr(machInst, INTREG_PC,
> INTREG_LR, imm32, false);
> }
222a232
> case 0x3f:
223a234
>
226c237,248
< return new MrsCpsr(machInst, rd);
---
> const bool r = bits(machInst, 20);
> if (bits(machInst, 5)) {
> const uint8_t sysM = (bits(machInst, 4) << 4) |
> bits(machInst, 11, 8);
> return new MrsBankedReg(machInst, rd, sysM, r);
> } else {
> if (r) {
> return new MrsSpsr(machInst, rd);
> } else {
> return new MrsCpsr(machInst, rd);
> }
> }
228c250
< case 0x3f:
---
> case 0xfe:
230,232c252,254
< const IntRegIndex rd =
< (IntRegIndex)(uint32_t)bits(machInst, 11, 8);
< return new MrsSpsr(machInst, rd);
---
> uint32_t imm16 = (bits(machInst, 19, 16) << 12) |
> (bits(machInst, 11, 0) << 0);
> return new Hvc(machInst, imm16);