aarch64.isa (14128:6ed23d07d0d1) | aarch64.isa (14150:1391e94a7b95) |
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1// Copyright (c) 2011-2019 ARM Limited 2// All rights reserved 3// 4// The license below extends only to copyright in the software and shall 5// not be construed as granting a license to any other intellectual 6// property including but not limited to intellectual property relating 7// to a hardware implementation of the functionality of the software 8// licensed hereunder. You may use the software subject to the license --- 573 unchanged lines hidden (view full) --- 582 case 0x3: 583 return new STLXRX64(machInst, rt, rnsp, rs); 584 default: 585 M5_UNREACHABLE; 586 } 587 case 0x2: 588 switch (size) { 589 case 0x0: | 1// Copyright (c) 2011-2019 ARM Limited 2// All rights reserved 3// 4// The license below extends only to copyright in the software and shall 5// not be construed as granting a license to any other intellectual 6// property including but not limited to intellectual property relating 7// to a hardware implementation of the functionality of the software 8// licensed hereunder. You may use the software subject to the license --- 573 unchanged lines hidden (view full) --- 582 case 0x3: 583 return new STLXRX64(machInst, rt, rnsp, rs); 584 default: 585 M5_UNREACHABLE; 586 } 587 case 0x2: 588 switch (size) { 589 case 0x0: |
590 return new CASP32(machInst, rt, rnsp, rs); |
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590 case 0x1: | 591 case 0x1: |
591 return new Unknown64(machInst); | 592 return new CASP64(machInst, rt, rnsp, rs); |
592 case 0x2: 593 return new STXPW64(machInst, rs, rt, rt2, rnsp); 594 case 0x3: 595 return new STXPX64(machInst, rs, rt, rt2, rnsp); 596 default: 597 M5_UNREACHABLE; 598 } 599 600 case 0x3: 601 switch (size) { 602 case 0x0: | 593 case 0x2: 594 return new STXPW64(machInst, rs, rt, rt2, rnsp); 595 case 0x3: 596 return new STXPX64(machInst, rs, rt, rt2, rnsp); 597 default: 598 M5_UNREACHABLE; 599 } 600 601 case 0x3: 602 switch (size) { 603 case 0x0: |
604 return new CASPL32(machInst, rt, rnsp, rs); |
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603 case 0x1: | 605 case 0x1: |
604 return new Unknown64(machInst); | 606 return new CASPL64(machInst, rt, rnsp, rs); |
605 case 0x2: 606 return new STLXPW64(machInst, rs, rt, rt2, rnsp); 607 case 0x3: 608 return new STLXPX64(machInst, rs, rt, rt2, rnsp); 609 default: 610 M5_UNREACHABLE; 611 } 612 --- 21 unchanged lines hidden (view full) --- 634 case 0x3: 635 return new LDAXRX64(machInst, rt, rnsp, rs); 636 default: 637 M5_UNREACHABLE; 638 } 639 case 0x6: 640 switch (size) { 641 case 0x0: | 607 case 0x2: 608 return new STLXPW64(machInst, rs, rt, rt2, rnsp); 609 case 0x3: 610 return new STLXPX64(machInst, rs, rt, rt2, rnsp); 611 default: 612 M5_UNREACHABLE; 613 } 614 --- 21 unchanged lines hidden (view full) --- 636 case 0x3: 637 return new LDAXRX64(machInst, rt, rnsp, rs); 638 default: 639 M5_UNREACHABLE; 640 } 641 case 0x6: 642 switch (size) { 643 case 0x0: |
644 return new CASPA32(machInst, rt, rnsp, rs); |
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642 case 0x1: | 645 case 0x1: |
643 return new Unknown64(machInst); | 646 return new CASPA64(machInst, rt, rnsp, rs); |
644 case 0x2: 645 return new LDXPW64(machInst, rt, rt2, rnsp); 646 case 0x3: 647 return new LDXPX64(machInst, rt, rt2, rnsp); 648 default: 649 M5_UNREACHABLE; 650 } | 647 case 0x2: 648 return new LDXPW64(machInst, rt, rt2, rnsp); 649 case 0x3: 650 return new LDXPX64(machInst, rt, rt2, rnsp); 651 default: 652 M5_UNREACHABLE; 653 } |
651 | |
652 case 0x7: 653 switch (size) { 654 case 0x0: | 654 case 0x7: 655 switch (size) { 656 case 0x0: |
657 return new CASPAL32(machInst, rt, rnsp, rs); |
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655 case 0x1: | 658 case 0x1: |
656 return new Unknown64(machInst); | 659 return new CASPAL64(machInst, rt, rnsp, rs); |
657 case 0x2: 658 return new LDAXPW64(machInst, rt, rt2, rnsp); 659 case 0x3: 660 return new LDAXPX64(machInst, rt, rt2, rnsp); 661 default: 662 M5_UNREACHABLE; 663 } | 660 case 0x2: 661 return new LDAXPW64(machInst, rt, rt2, rnsp); 662 case 0x3: 663 return new LDAXPX64(machInst, rt, rt2, rnsp); 664 default: 665 M5_UNREACHABLE; 666 } |
664 | |
665 case 0x9: 666 switch (size) { 667 case 0x0: 668 return new STLRB64(machInst, rt, rnsp); 669 case 0x1: 670 return new STLRH64(machInst, rt, rnsp); 671 case 0x2: 672 return new STLRW64(machInst, rt, rnsp); 673 case 0x3: 674 return new STLRX64(machInst, rt, rnsp); 675 default: 676 M5_UNREACHABLE; 677 } | 667 case 0x9: 668 switch (size) { 669 case 0x0: 670 return new STLRB64(machInst, rt, rnsp); 671 case 0x1: 672 return new STLRH64(machInst, rt, rnsp); 673 case 0x2: 674 return new STLRW64(machInst, rt, rnsp); 675 case 0x3: 676 return new STLRX64(machInst, rt, rnsp); 677 default: 678 M5_UNREACHABLE; 679 } |
680 case 0xa: 681 switch (size) { 682 case 0x0: 683 return new CASB(machInst, rt, rnsp, rs); 684 case 0x1: 685 return new CASH(machInst, rt, rnsp, rs); 686 case 0x2: 687 return new CAS32(machInst, rt, rnsp, rs); 688 case 0x3: 689 return new CAS64(machInst, rt, rnsp, rs); 690 default: 691 M5_UNREACHABLE; 692 } 693 case 0xb: 694 switch (size) { 695 case 0x0: 696 return new CASLB(machInst, rt, rnsp, rs); 697 case 0x1: 698 return new CASLH(machInst, rt, rnsp, rs); 699 case 0x2: 700 return new CASL32(machInst, rt, rnsp, rs); 701 case 0x3: 702 return new CASL64(machInst, rt, rnsp, rs); 703 default: 704 M5_UNREACHABLE; 705 } |
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678 case 0xd: 679 switch (size) { 680 case 0x0: 681 return new LDARB64(machInst, rt, rnsp); 682 case 0x1: 683 return new LDARH64(machInst, rt, rnsp); 684 case 0x2: 685 return new LDARW64(machInst, rt, rnsp); 686 case 0x3: 687 return new LDARX64(machInst, rt, rnsp); 688 default: 689 M5_UNREACHABLE; 690 } | 706 case 0xd: 707 switch (size) { 708 case 0x0: 709 return new LDARB64(machInst, rt, rnsp); 710 case 0x1: 711 return new LDARH64(machInst, rt, rnsp); 712 case 0x2: 713 return new LDARW64(machInst, rt, rnsp); 714 case 0x3: 715 return new LDARX64(machInst, rt, rnsp); 716 default: 717 M5_UNREACHABLE; 718 } |
719 case 0xe: 720 switch (size) { 721 case 0x0: 722 return new CASAB(machInst, rt, rnsp, rs); 723 case 0x1: 724 return new CASAH(machInst, rt, rnsp, rs); 725 case 0x2: 726 return new CASA32(machInst, rt, rnsp, rs); 727 case 0x3: 728 return new CASA64(machInst, rt, rnsp, rs); 729 default: 730 M5_UNREACHABLE; 731 } 732 case 0xf: 733 switch (size) { 734 case 0x0: 735 return new CASALB(machInst, rt, rnsp, rs); 736 case 0x1: 737 return new CASALH(machInst, rt, rnsp, rs); 738 case 0x2: 739 return new CASAL32(machInst, rt, rnsp, rs); 740 case 0x3: 741 return new CASAL64(machInst, rt, rnsp, rs); 742 default: 743 M5_UNREACHABLE; 744 } |
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691 default: 692 return new Unknown64(machInst); 693 } 694 } else if (bits(machInst, 31)) { 695 return new Unknown64(machInst); 696 } else { 697 return decodeNeonMem(machInst); 698 } --- 1626 unchanged lines hidden --- | 745 default: 746 return new Unknown64(machInst); 747 } 748 } else if (bits(machInst, 31)) { 749 return new Unknown64(machInst); 750 } else { 751 return decodeNeonMem(machInst); 752 } --- 1626 unchanged lines hidden --- |