aarch64.isa (12714:6870e0c151b1) aarch64.isa (12856:cca88f84cb80)
1// Copyright (c) 2011-2018 ARM Limited
2// All rights reserved
3//
4// The license below extends only to copyright in the software and shall
5// not be construed as granting a license to any other intellectual
6// property including but not limited to intellectual property relating
7// to a hardware implementation of the functionality of the software
8// licensed hereunder. You may use the software subject to the license

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777 case 0x1c:
778 return new STRDFP64_IMM(machInst, rt, rnsp, imm12 << 3);
779 case 0x1d:
780 return new LDRDFP64_IMM(machInst, rt, rnsp, imm12 << 3);
781 default:
782 return new Unknown64(machInst);
783 }
784 } else if (bits(machInst, 21) == 1) {
1// Copyright (c) 2011-2018 ARM Limited
2// All rights reserved
3//
4// The license below extends only to copyright in the software and shall
5// not be construed as granting a license to any other intellectual
6// property including but not limited to intellectual property relating
7// to a hardware implementation of the functionality of the software
8// licensed hereunder. You may use the software subject to the license

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777 case 0x1c:
778 return new STRDFP64_IMM(machInst, rt, rnsp, imm12 << 3);
779 case 0x1d:
780 return new LDRDFP64_IMM(machInst, rt, rnsp, imm12 << 3);
781 default:
782 return new Unknown64(machInst);
783 }
784 } else if (bits(machInst, 21) == 1) {
785 if (bits(machInst, 11, 10) != 0x2)
786 return new Unknown64(machInst);
787 if (!bits(machInst, 14))
788 return new Unknown64(machInst);
789 IntRegIndex rt = (IntRegIndex)(uint32_t)bits(machInst, 4, 0);
790 IntRegIndex rn = (IntRegIndex)(uint32_t)bits(machInst, 9, 5);
791 IntRegIndex rnsp = makeSP(rn);
792 IntRegIndex rm = (IntRegIndex)(uint32_t)bits(machInst, 20, 16);
793 ArmExtendType type =
794 (ArmExtendType)(uint32_t)bits(machInst, 15, 13);
795 uint8_t s = bits(machInst, 12);
796 switch (switchVal) {
797 case 0x00:
798 return new STRB64_REG(machInst, rt, rnsp, rm, type, 0);
799 case 0x01:
800 return new LDRB64_REG(machInst, rt, rnsp, rm, type, 0);
801 case 0x02:
802 return new LDRSBX64_REG(machInst, rt, rnsp, rm, type, 0);
803 case 0x03:
804 return new LDRSBW64_REG(machInst, rt, rnsp, rm, type, 0);
805 case 0x04:
806 return new STRBFP64_REG(machInst, rt, rnsp, rm, type, 0);
807 case 0x05:
808 return new LDRBFP64_REG(machInst, rt, rnsp, rm, type, 0);
809 case 0x6:
810 return new BigFpMemReg("str", machInst, false,
811 rt, rnsp, rm, type, s * 4);
812 case 0x7:
813 return new BigFpMemReg("ldr", machInst, true,
814 rt, rnsp, rm, type, s * 4);
815 case 0x08:
816 return new STRH64_REG(machInst, rt, rnsp, rm, type, s);
817 case 0x09:
818 return new LDRH64_REG(machInst, rt, rnsp, rm, type, s);
819 case 0x0a:
820 return new LDRSHX64_REG(machInst, rt, rnsp, rm, type, s);
821 case 0x0b:
822 return new LDRSHW64_REG(machInst, rt, rnsp, rm, type, s);
823 case 0x0c:
824 return new STRHFP64_REG(machInst, rt, rnsp, rm, type, s);
825 case 0x0d:
826 return new LDRHFP64_REG(machInst, rt, rnsp, rm, type, s);
827 case 0x10:
828 return new STRW64_REG(machInst, rt, rnsp, rm, type, s * 2);
829 case 0x11:
830 return new LDRW64_REG(machInst, rt, rnsp, rm, type, s * 2);
831 case 0x12:
832 return new LDRSW64_REG(machInst, rt, rnsp, rm, type, s * 2);
833 case 0x14:
834 return new STRSFP64_REG(machInst, rt, rnsp, rm, type, s * 2);
835 case 0x15:
836 return new LDRSFP64_REG(machInst, rt, rnsp, rm, type, s * 2);
837 case 0x18:
838 return new STRX64_REG(machInst, rt, rnsp, rm, type, s * 3);
839 case 0x19:
840 return new LDRX64_REG(machInst, rt, rnsp, rm, type, s * 3);
841 case 0x1a:
842 return new PRFM64_REG(machInst, rt, rnsp, rm, type, s * 3);
843 case 0x1c:
844 return new STRDFP64_REG(machInst, rt, rnsp, rm, type, s * 3);
845 case 0x1d:
846 return new LDRDFP64_REG(machInst, rt, rnsp, rm, type, s * 3);
785 uint8_t group = bits(machInst, 11, 10);
786 switch (group) {
787 case 0x0:
788 {
789 if ((switchVal & 0x7) == 0x2 &&
790 bits(machInst, 20, 12) == 0x1fc) {
791 IntRegIndex rt = (IntRegIndex)(uint32_t)
792 bits(machInst, 4, 0);
793 IntRegIndex rn = (IntRegIndex)(uint32_t)
794 bits(machInst, 9, 5);
795 IntRegIndex rnsp = makeSP(rn);
796 uint8_t size = bits(machInst, 31, 30);
797 switch (size) {
798 case 0x0:
799 return new LDAPRB64(machInst, rt, rnsp);
800 case 0x1:
801 return new LDAPRH64(machInst, rt, rnsp);
802 case 0x2:
803 return new LDAPRW64(machInst, rt, rnsp);
804 case 0x3:
805 return new LDAPRX64(machInst, rt, rnsp);
806 default:
807 M5_UNREACHABLE;
808 }
809 } else {
810 return new Unknown64(machInst);
811 }
812 }
813 case 0x2:
814 {
815 if (!bits(machInst, 14))
816 return new Unknown64(machInst);
817 IntRegIndex rt = (IntRegIndex)(uint32_t)
818 bits(machInst, 4, 0);
819 IntRegIndex rn = (IntRegIndex)(uint32_t)
820 bits(machInst, 9, 5);
821 IntRegIndex rnsp = makeSP(rn);
822 IntRegIndex rm = (IntRegIndex)(uint32_t)
823 bits(machInst, 20, 16);
824 ArmExtendType type =
825 (ArmExtendType)(uint32_t)bits(machInst, 15, 13);
826 uint8_t s = bits(machInst, 12);
827 switch (switchVal) {
828 case 0x00:
829 return new STRB64_REG(machInst, rt, rnsp, rm,
830 type, 0);
831 case 0x01:
832 return new LDRB64_REG(machInst, rt, rnsp, rm,
833 type, 0);
834 case 0x02:
835 return new LDRSBX64_REG(machInst, rt, rnsp, rm,
836 type, 0);
837 case 0x03:
838 return new LDRSBW64_REG(machInst, rt, rnsp, rm,
839 type, 0);
840 case 0x04:
841 return new STRBFP64_REG(machInst, rt, rnsp, rm,
842 type, 0);
843 case 0x05:
844 return new LDRBFP64_REG(machInst, rt, rnsp, rm,
845 type, 0);
846 case 0x6:
847 return new BigFpMemReg("str", machInst, false,
848 rt, rnsp, rm, type, s * 4);
849 case 0x7:
850 return new BigFpMemReg("ldr", machInst, true,
851 rt, rnsp, rm, type, s * 4);
852 case 0x08:
853 return new STRH64_REG(machInst, rt, rnsp, rm,
854 type, s);
855 case 0x09:
856 return new LDRH64_REG(machInst, rt, rnsp, rm,
857 type, s);
858 case 0x0a:
859 return new LDRSHX64_REG(machInst, rt, rnsp, rm,
860 type, s);
861 case 0x0b:
862 return new LDRSHW64_REG(machInst, rt, rnsp, rm,
863 type, s);
864 case 0x0c:
865 return new STRHFP64_REG(machInst, rt, rnsp, rm,
866 type, s);
867 case 0x0d:
868 return new LDRHFP64_REG(machInst, rt, rnsp, rm,
869 type, s);
870 case 0x10:
871 return new STRW64_REG(machInst, rt, rnsp, rm,
872 type, s * 2);
873 case 0x11:
874 return new LDRW64_REG(machInst, rt, rnsp, rm,
875 type, s * 2);
876 case 0x12:
877 return new LDRSW64_REG(machInst, rt, rnsp, rm,
878 type, s * 2);
879 case 0x14:
880 return new STRSFP64_REG(machInst, rt, rnsp, rm,
881 type, s * 2);
882 case 0x15:
883 return new LDRSFP64_REG(machInst, rt, rnsp, rm,
884 type, s * 2);
885 case 0x18:
886 return new STRX64_REG(machInst, rt, rnsp, rm,
887 type, s * 3);
888 case 0x19:
889 return new LDRX64_REG(machInst, rt, rnsp, rm,
890 type, s * 3);
891 case 0x1a:
892 return new PRFM64_REG(machInst, rt, rnsp, rm,
893 type, s * 3);
894 case 0x1c:
895 return new STRDFP64_REG(machInst, rt, rnsp, rm,
896 type, s * 3);
897 case 0x1d:
898 return new LDRDFP64_REG(machInst, rt, rnsp, rm,
899 type, s * 3);
900 default:
901 return new Unknown64(machInst);
902
903 }
904 }
847 default:
848 return new Unknown64(machInst);
849 }
850 } else {
851 // bit 29:27=111, 25:24=00, 21=0
852 switch (bits(machInst, 11, 10)) {
853 case 0x0:
854 {

--- 1325 unchanged lines hidden --- 		905 default:
906 return new Unknown64(machInst);
907 }
908 } else {
909 // bit 29:27=111, 25:24=00, 21=0
910 switch (bits(machInst, 11, 10)) {
911 case 0x0:
912 {

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