| aarch64.isa (12531:3141027bd11a) | aarch64.isa (12538:001ad6b1e592) |
|---|---|
| 1// Copyright (c) 2011-2018 ARM Limited 2// All rights reserved 3// 4// The license below extends only to copyright in the software and shall 5// not be construed as granting a license to any other intellectual 6// property including but not limited to intellectual property relating 7// to a hardware implementation of the functionality of the software 8// licensed hereunder. You may use the software subject to the license --- 228 unchanged lines hidden (view full) --- 237 if (bits(machInst, 31) == 0) { 238 if (bits(machInst, 25, 24) || bits(machInst, 4)) 239 return new Unknown64(machInst); 240 int64_t imm = sext<19>(bits(machInst, 23, 5)) << 2; 241 ConditionCode condCode = 242 (ConditionCode)(uint8_t)(bits(machInst, 3, 0)); 243 return new BCond64(machInst, imm, condCode); 244 } else if (bits(machInst, 25, 24) == 0x0) { | 1// Copyright (c) 2011-2018 ARM Limited 2// All rights reserved 3// 4// The license below extends only to copyright in the software and shall 5// not be construed as granting a license to any other intellectual 6// property including but not limited to intellectual property relating 7// to a hardware implementation of the functionality of the software 8// licensed hereunder. You may use the software subject to the license --- 228 unchanged lines hidden (view full) --- 237 if (bits(machInst, 31) == 0) { 238 if (bits(machInst, 25, 24) || bits(machInst, 4)) 239 return new Unknown64(machInst); 240 int64_t imm = sext<19>(bits(machInst, 23, 5)) << 2; 241 ConditionCode condCode = 242 (ConditionCode)(uint8_t)(bits(machInst, 3, 0)); 243 return new BCond64(machInst, imm, condCode); 244 } else if (bits(machInst, 25, 24) == 0x0) { |
| 245 |
|
| 245 if (bits(machInst, 4, 2)) 246 return new Unknown64(machInst); | 246 if (bits(machInst, 4, 2)) 247 return new Unknown64(machInst); |
| 248 249 auto imm16 = bits(machInst, 20, 5); |
|
| 247 uint8_t decVal = (bits(machInst, 1, 0) << 0) | 248 (bits(machInst, 23, 21) << 2); | 250 uint8_t decVal = (bits(machInst, 1, 0) << 0) | 251 (bits(machInst, 23, 21) << 2); |
| 252 |
|
| 249 switch (decVal) { 250 case 0x01: | 253 switch (decVal) { 254 case 0x01: |
| 251 return new Svc64(machInst); | 255 return new Svc64(machInst, imm16); |
| 252 case 0x02: | 256 case 0x02: |
| 253 return new Hvc64(machInst); | 257 return new Hvc64(machInst, imm16); |
| 254 case 0x03: | 258 case 0x03: |
| 255 return new Smc64(machInst); | 259 return new Smc64(machInst, imm16); |
| 256 case 0x04: | 260 case 0x04: |
| 257 return new Brk64(machInst); | 261 return new Brk64(machInst, imm16); |
| 258 case 0x08: | 262 case 0x08: |
| 259 return new Hlt64(machInst); | 263 return new Hlt64(machInst, imm16); |
| 260 case 0x15: 261 return new FailUnimplemented("dcps1", machInst); 262 case 0x16: 263 return new FailUnimplemented("dcps2", machInst); 264 case 0x17: 265 return new FailUnimplemented("dcps3", machInst); 266 default: 267 return new Unknown64(machInst); --- 1829 unchanged lines hidden --- | 264 case 0x15: 265 return new FailUnimplemented("dcps1", machInst); 266 case 0x16: 267 return new FailUnimplemented("dcps2", machInst); 268 case 0x17: 269 return new FailUnimplemented("dcps3", machInst); 270 default: 271 return new Unknown64(machInst); --- 1829 unchanged lines hidden --- |