1// Copyright (c) 2011-2013 ARM Limited 2// All rights reserved 3// 4// The license below extends only to copyright in the software and shall 5// not be construed as granting a license to any other intellectual 6// property including but not limited to intellectual property relating 7// to a hardware implementation of the functionality of the software 8// licensed hereunder. You may use the software subject to the license --- 360 unchanged lines hidden (view full) --- 369 else 370 return new Msr64(machInst, (IntRegIndex) miscReg, rt, iss); 371 } else if (miscRegInfo[miscReg][MISCREG_WARN_NOT_FAIL]) { 372 std::string full_mnem = csprintf("%s %s", 373 read ? "mrs" : "msr", miscRegName[miscReg]); 374 return new WarnUnimplemented(read ? "mrs" : "msr", 375 machInst, full_mnem); 376 } else { |
377 return new FailUnimplemented(read ? "mrs" : "msr", 378 machInst, 379 csprintf("%s %s", 380 read ? "mrs" : "msr", 381 miscRegName[miscReg])); |
382 } 383 } 384 break; 385 } 386 } else if (bits(machInst, 25) == 0x1) { 387 uint8_t opc = bits(machInst, 24, 21); 388 uint8_t op2 = bits(machInst, 20, 16); 389 uint8_t op3 = bits(machInst, 15, 10); --- 1648 unchanged lines hidden --- |