thumb.isa (7213:beadb1dc1be6) thumb.isa (7245:bee7e6b76d38)
1// -*- mode:c++ -*-
2
3// Copyright (c) 2010 ARM Limited
4// All rights reserved
5//
6// The license below extends only to copyright in the software and shall
7// not be construed as granting a license to any other intellectual
8// property including but not limited to intellectual property relating

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63 0x7: decode TOPCODE_12_11 {
64 0x0: Thumb16UncondBranch::thumb16UncondBranch();
65 }
66 }
67
68 // 32 bit thumb instructions.
69 1: decode HTOPCODE_12_11 {
70 0x1: decode HTOPCODE_10_9 {
1// -*- mode:c++ -*-
2
3// Copyright (c) 2010 ARM Limited
4// All rights reserved
5//
6// The license below extends only to copyright in the software and shall
7// not be construed as granting a license to any other intellectual
8// property including but not limited to intellectual property relating

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63 0x7: decode TOPCODE_12_11 {
64 0x0: Thumb16UncondBranch::thumb16UncondBranch();
65 }
66 }
67
68 // 32 bit thumb instructions.
69 1: decode HTOPCODE_12_11 {
70 0x1: decode HTOPCODE_10_9 {
71 0x0: decode HTOPCODE_8_6 {
72 0x0, 0x6: decode HTOPCODE_4 {
73 0x0: WarnUnimpl::srs();
74 0x1: WarnUnimpl::rfe();
75 }
76 0x1: decode HTOPCODE_5_4 {
77 0x0: WarnUnimpl::strex();
78 0x1: WarnUnimpl::ldrex();
79 0x2: WarnUnimpl::strd(); // immediate
80 0x3: decode HTRN {
81 0xf: WarnUnimpl::ldrd(); // literal
82 default: WarnUnimpl::ldrd(); // immediate
71 0x0: decode HTOPCODE_6 {
72 0x0: decode HTOPCODE_8_7 {
73 0x0, 0x3: decode HTOPCODE_4 {
74 0x0: WarnUnimpl::srs();
75 0x1: WarnUnimpl::rfe();
83 }
76 }
77 // This uses the same encoding as regular ARM.
78 default: ArmMacroMem::armMacroMem();
84 }
79 }
85 // This uses the same encoding as regular ARM.
86 0x2: ArmMacroMem::armMacroMem();
87 0x3: decode HTOPCODE_5_4 {
88 0x0: decode LTOPCODE_7_4 {
89 0x4: WarnUnimpl::strexb();
90 0x5: WarnUnimpl::strexh();
91 0x7: WarnUnimpl::strexd();
92 }
93 0x1: decode LTOPCODE_7_4 {
94 0x0: WarnUnimpl::tbb();
95 0x1: WarnUnimpl::tbh();
96 0x4: WarnUnimpl::ldrexb();
97 0x5: WarnUnimpl::ldrexh();
98 0x7: WarnUnimpl::ldrexd();
99 }
100 0x2: WarnUnimpl::strd(); // immediate
101 0x3: decode HTRN {
102 0xf: WarnUnimpl::ldrd(); // literal
103 default: WarnUnimpl::ldrd(); // immediate
104 }
105 }
106 // This uses the same encoding as regular ARM.
107 0x4: ArmMacroMem::armMacroMem();
108 0x5, 0x7: decode HTOPCODE_4 {
109 0x0: WarnUnimpl::strd(); // immediate
110 0x1: decode HTRN {
111 0xf: WarnUnimpl::ldrd(); // literal
112 default: WarnUnimpl::ldrd(); // immediate
113 }
114 }
80 0x1: Thumb32LdrStrDExTbh::thumb32LdrStrDExTbh();
115 }
116 0x1: Thumb32DataProcShiftReg::thumb32DataProcShiftReg();
117 default: decode HTOPCODE_9_8 {
118 0x2: decode LTOPCODE_4 {
119 0x0: decode LTCOPROC {
120 0xa, 0xb: decode OPCODE_23_20 {
121##include "vfp.isa"
122 }

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82 0x1: Thumb32DataProcShiftReg::thumb32DataProcShiftReg();
83 default: decode HTOPCODE_9_8 {
84 0x2: decode LTOPCODE_4 {
85 0x0: decode LTCOPROC {
86 0xa, 0xb: decode OPCODE_23_20 {
87##include "vfp.isa"
88 }

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