1// -*- mode:c++ -*- 2 3// Copyright (c) 2010 ARM Limited 4// All rights reserved 5// 6// The license below extends only to copyright in the software and shall 7// not be construed as granting a license to any other intellectual 8// property including but not limited to intellectual property relating --- 76 unchanged lines hidden (view full) --- 85 0x0: decode LTCOPROC { 86 0xa, 0xb: decode OPCODE_23_20 { 87##include "vfp.isa" 88 } 89 default: WarnUnimpl::cdp(); // cdp2 90 } 91 0x1: decode LTCOPROC { 92 0xa, 0xb: WarnUnimpl::Core_to_extension_transfer(); |
93 default: decode CPNUM { 94 15: McrMrc15::mcrMrc15(); 95 default: decode HTOPCODE_4 { 96 0x0: WarnUnimpl::mcr(); 97 0x1: WarnUnimpl::mrc(); 98 } |
99 } 100 } 101 } 102 0x3: WarnUnimpl::Advanced_SIMD(); 103 default: decode LTCOPROC { 104 0xa, 0xb: decode HTOPCODE_9_4 { 105 0x00: WarnUnimpl::undefined(); 106 0x04: WarnUnimpl::mcrr(); // mcrr2 --- 46 unchanged lines hidden (view full) --- 153 default: decode HTOPCODE_9_8 { 154 0x2: decode LTOPCODE_4 { 155 0x0: decode LTCOPROC { 156 0xa, 0xb: WarnUnimpl::VFP_Inst(); 157 default: WarnUnimpl::cdp(); // cdp2 158 } 159 0x1: decode LTCOPROC { 160 0xa, 0xb: WarnUnimpl::Core_to_extension_transfer(); |
161 default: decode CPNUM { 162 15: McrMrc15::mcr2Mrc215(); 163 default: decode HTOPCODE_4 { 164 0x0: WarnUnimpl::mcr2(); 165 0x1: WarnUnimpl::mrc2(); 166 } |
167 } 168 } 169 } 170 0x3: WarnUnimpl::Advanced_SIMD(); 171 default: decode LTCOPROC { 172 0xa, 0xb: decode HTOPCODE_9_4 { 173 0x00: WarnUnimpl::undefined(); 174 0x04: WarnUnimpl::mcrr(); // mcrr2 --- 23 unchanged lines hidden --- |