arm.isa (8868:26dbd171754e) | arm.isa (10037:5cac77888310) |
---|---|
1// -*- mode:c++ -*- 2 | 1// -*- mode:c++ -*- 2 |
3// Copyright (c) 2010-2012 ARM Limited | 3// Copyright (c) 2010-2013 ARM Limited |
4// All rights reserved 5// 6// The license below extends only to copyright in the software and shall 7// not be construed as granting a license to any other intellectual 8// property including but not limited to intellectual property relating 9// to a hardware implementation of the functionality of the software 10// licensed hereunder. You may use the software subject to the license 11// terms below provided that you ensure that this notice is replicated --- 56 unchanged lines hidden (view full) --- 68 0x0: decode MISC_OPCODE { 69 0x0: ArmMsrMrs::armMsrMrs(); 70 // bxj unimplemented, treated as bx 71 0x1,0x2: ArmBxClz::armBxClz(); 72 0x3: decode OPCODE { 73 0x9: ArmBlxReg::armBlxReg(); 74 } 75 0x5: ArmSatAddSub::armSatAddSub(); | 4// All rights reserved 5// 6// The license below extends only to copyright in the software and shall 7// not be construed as granting a license to any other intellectual 8// property including but not limited to intellectual property relating 9// to a hardware implementation of the functionality of the software 10// licensed hereunder. You may use the software subject to the license 11// terms below provided that you ensure that this notice is replicated --- 56 unchanged lines hidden (view full) --- 68 0x0: decode MISC_OPCODE { 69 0x0: ArmMsrMrs::armMsrMrs(); 70 // bxj unimplemented, treated as bx 71 0x1,0x2: ArmBxClz::armBxClz(); 72 0x3: decode OPCODE { 73 0x9: ArmBlxReg::armBlxReg(); 74 } 75 0x5: ArmSatAddSub::armSatAddSub(); |
76 0x7: Breakpoint::bkpt(); | 76 0x6: ArmERet::armERet(); 77 0x7: decode OPCODE_22 { 78 0: Breakpoint::bkpt(); 79 1: ArmSmcHyp::armSmcHyp(); 80 } |
77 } 78 0x1: ArmHalfWordMultAndMultAcc::armHalfWordMultAndMultAcc(); 79 } 80 } 81 } 82 0x1: decode IS_MISC { 83 0: ArmDataProcImm::armDataProcImm(); 84 1: ArmMisc::armMisc(); --- 15 unchanged lines hidden (view full) --- 100 } 101 0x4: ArmMacroMem::armMacroMem(); 102 0x5: decode OPCODE_24 { 103 0: ArmBBlxImm::armBBlxImm(); 104 1: ArmBlBlxImm::armBlBlxImm(); 105 } 106 0x6: decode CPNUM { 107 0xa, 0xb: ExtensionRegLoadStore::extensionRegLoadStore(); | 81 } 82 0x1: ArmHalfWordMultAndMultAcc::armHalfWordMultAndMultAcc(); 83 } 84 } 85 } 86 0x1: decode IS_MISC { 87 0: ArmDataProcImm::armDataProcImm(); 88 1: ArmMisc::armMisc(); --- 15 unchanged lines hidden (view full) --- 104 } 105 0x4: ArmMacroMem::armMacroMem(); 106 0x5: decode OPCODE_24 { 107 0: ArmBBlxImm::armBBlxImm(); 108 1: ArmBlBlxImm::armBlBlxImm(); 109 } 110 0x6: decode CPNUM { 111 0xa, 0xb: ExtensionRegLoadStore::extensionRegLoadStore(); |
112 0xf: decode OPCODE_20 { 113 0: Mcrr15::Mcrr15(); 114 1: Mrrc15::Mrrc15(); 115 } |
|
108 } 109 0x7: decode OPCODE_24 { 110 0: decode OPCODE_4 { 111 0: decode CPNUM { 112 0xa, 0xb: VfpData::vfpData(); 113 } // CPNUM 114 1: decode CPNUM { // 27-24=1110,4 ==1 115 0x1: M5ops::m5ops(); --- 13 unchanged lines hidden --- | 116 } 117 0x7: decode OPCODE_24 { 118 0: decode OPCODE_4 { 119 0: decode CPNUM { 120 0xa, 0xb: VfpData::vfpData(); 121 } // CPNUM 122 1: decode CPNUM { // 27-24=1110,4 ==1 123 0x1: M5ops::m5ops(); --- 13 unchanged lines hidden --- |