arm.isa (7418:e81194228b6e) arm.isa (7433:b812790a16eb)
1// -*- mode:c++ -*-
2
3// Copyright (c) 2010 ARM Limited
4// All rights reserved
5//
6// The license below extends only to copyright in the software and shall
7// not be construed as granting a license to any other intellectual
8// property including but not limited to intellectual property relating

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45// The actual ARM ISA decoder
46// --------------------------
47// The following instructions are specified in the ARM ISA
48// Specification. Decoding closely follows the style specified
49// in the ARM ISA specification document starting with Table B.1 or 3-1
50//
51//
52
1// -*- mode:c++ -*-
2
3// Copyright (c) 2010 ARM Limited
4// All rights reserved
5//
6// The license below extends only to copyright in the software and shall
7// not be construed as granting a license to any other intellectual
8// property including but not limited to intellectual property relating

--- 36 unchanged lines hidden (view full) ---

45// The actual ARM ISA decoder
46// --------------------------
47// The following instructions are specified in the ARM ISA
48// Specification. Decoding closely follows the style specified
49// in the ARM ISA specification document starting with Table B.1 or 3-1
50//
51//
52
530: decode COND_CODE {
53decode COND_CODE {
540xF: ArmUnconditional::armUnconditional();
55default: decode ENCODING {
56format DataOp {
57 0x0: decode SEVEN_AND_FOUR {
58 1: decode MISC_OPCODE {
59 0x9: decode PREPOST {
60 0: ArmMultAndMultAcc::armMultAndMultAcc();
61 1: ArmSyncMem::armSyncMem();

--- 60 unchanged lines hidden --- 		540xF: ArmUnconditional::armUnconditional();
55default: decode ENCODING {
56format DataOp {
57 0x0: decode SEVEN_AND_FOUR {
58 1: decode MISC_OPCODE {
59 0x9: decode PREPOST {
60 0: ArmMultAndMultAcc::armMultAndMultAcc();
61 1: ArmSyncMem::armSyncMem();

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