arm.isa (7243:d503503b3966) | arm.isa (7252:bba68021edca) |
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1// -*- mode:c++ -*- 2 3// Copyright (c) 2010 ARM Limited 4// All rights reserved 5// 6// The license below extends only to copyright in the software and shall 7// not be construed as granting a license to any other intellectual 8// property including but not limited to intellectual property relating --- 53 unchanged lines hidden (view full) --- 62 } 63 0xb, 0xd, 0xf: AddrMode3::addrMode3(); 64 } 65 0: decode IS_MISC { 66 0: ArmDataProcReg::armDataProcReg(); 67 1: decode OPCODE_7 { 68 0x0: decode MISC_OPCODE { 69 0x0: ArmMsrMrs::armMsrMrs(); | 1// -*- mode:c++ -*- 2 3// Copyright (c) 2010 ARM Limited 4// All rights reserved 5// 6// The license below extends only to copyright in the software and shall 7// not be construed as granting a license to any other intellectual 8// property including but not limited to intellectual property relating --- 53 unchanged lines hidden (view full) --- 62 } 63 0xb, 0xd, 0xf: AddrMode3::addrMode3(); 64 } 65 0: decode IS_MISC { 66 0: ArmDataProcReg::armDataProcReg(); 67 1: decode OPCODE_7 { 68 0x0: decode MISC_OPCODE { 69 0x0: ArmMsrMrs::armMsrMrs(); |
70 0x1: decode OPCODE { 71 0x9: ArmBx::armBx(); 72 0xb: PredOp::clz({{ 73 Rd = ((Rm == 0) ? 32 : (31 - findMsbSet(Rm))); 74 }}); 75 } | 70 0x1: ArmBxClz::armBxClz(); |
76 0x2: decode OPCODE { 77 0x9: WarnUnimpl::bxj(); 78 } 79 0x3: decode OPCODE { 80 0x9: ArmBlxReg::armBlxReg(); 81 } 82 0x5: ArmSatAddSub::armSatAddSub(); 83 } --- 156 unchanged lines hidden --- | 71 0x2: decode OPCODE { 72 0x9: WarnUnimpl::bxj(); 73 } 74 0x3: decode OPCODE { 75 0x9: ArmBlxReg::armBlxReg(); 76 } 77 0x5: ArmSatAddSub::armSatAddSub(); 78 } --- 156 unchanged lines hidden --- |