arm.isa (7203:39753c33e7aa) | arm.isa (7206:00494ff7ca71) |
---|---|
1// -*- mode:c++ -*- 2 3// Copyright (c) 2010 ARM Limited 4// All rights reserved 5// 6// The license below extends only to copyright in the software and shall 7// not be construed as granting a license to any other intellectual 8// property including but not limited to intellectual property relating --- 44 unchanged lines hidden (view full) --- 530: decode COND_CODE { 540xF: ArmUnconditional::armUnconditional(); 55default: decode ENCODING { 56format DataOp { 57 0x0: decode SEVEN_AND_FOUR { 58 1: decode MISC_OPCODE { 59 0x9: decode PREPOST { 60 0: ArmMultAndMultAcc::armMultAndMultAcc(); | 1// -*- mode:c++ -*- 2 3// Copyright (c) 2010 ARM Limited 4// All rights reserved 5// 6// The license below extends only to copyright in the software and shall 7// not be construed as granting a license to any other intellectual 8// property including but not limited to intellectual property relating --- 44 unchanged lines hidden (view full) --- 530: decode COND_CODE { 540xF: ArmUnconditional::armUnconditional(); 55default: decode ENCODING { 56format DataOp { 57 0x0: decode SEVEN_AND_FOUR { 58 1: decode MISC_OPCODE { 59 0x9: decode PREPOST { 60 0: ArmMultAndMultAcc::armMultAndMultAcc(); |
61 1: decode PUBWL { 62 0x10: WarnUnimpl::swp(); 63 0x14: WarnUnimpl::swpb(); 64 0x18: WarnUnimpl::strex(); 65 0x19: WarnUnimpl::ldrex(); 66 } | 61 1: ArmSyncMem::armSyncMem(); |
67 } 68 0xb, 0xd, 0xf: AddrMode3::addrMode3(); 69 } 70 0: decode IS_MISC { 71 0: ArmDataProcReg::armDataProcReg(); 72 1: decode OPCODE_7 { 73 0x0: decode MISC_OPCODE { 74 0x0: ArmMsrMrs::armMsrMrs(); --- 189 unchanged lines hidden --- | 62 } 63 0xb, 0xd, 0xf: AddrMode3::addrMode3(); 64 } 65 0: decode IS_MISC { 66 0: ArmDataProcReg::armDataProcReg(); 67 1: decode OPCODE_7 { 68 0x0: decode MISC_OPCODE { 69 0x0: ArmMsrMrs::armMsrMrs(); --- 189 unchanged lines hidden --- |