arm.isa (7199:3e96b80d1b55) arm.isa (7203:39753c33e7aa)
1// -*- mode:c++ -*-
2
3// Copyright (c) 2010 ARM Limited
4// All rights reserved
5//
6// The license below extends only to copyright in the software and shall
7// not be construed as granting a license to any other intellectual
8// property including but not limited to intellectual property relating

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66 }
67 }
68 0xb, 0xd, 0xf: AddrMode3::addrMode3();
69 }
70 0: decode IS_MISC {
71 0: ArmDataProcReg::armDataProcReg();
72 1: decode OPCODE_7 {
73 0x0: decode MISC_OPCODE {
1// -*- mode:c++ -*-
2
3// Copyright (c) 2010 ARM Limited
4// All rights reserved
5//
6// The license below extends only to copyright in the software and shall
7// not be construed as granting a license to any other intellectual
8// property including but not limited to intellectual property relating

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66 }
67 }
68 0xb, 0xd, 0xf: AddrMode3::addrMode3();
69 }
70 0: decode IS_MISC {
71 0: ArmDataProcReg::armDataProcReg();
72 1: decode OPCODE_7 {
73 0x0: decode MISC_OPCODE {
74 0x0: decode OPCODE {
75 0x8: PredOp::mrs_cpsr({{
76 Rd = (Cpsr | CondCodes) & 0xF8FF03DF;
77 }});
78 0x9: decode USEIMM {
79 // The mask field is the same as the RN index.
80 0: PredOp::msr_cpsr_reg({{
81 uint32_t newCpsr =
82 cpsrWriteByInstr(Cpsr | CondCodes,
83 Rm, RN, false);
84 Cpsr = ~CondCodesMask & newCpsr;
85 CondCodes = CondCodesMask & newCpsr;
86 }});
87 1: PredImmOp::msr_cpsr_imm({{
88 uint32_t newCpsr =
89 cpsrWriteByInstr(Cpsr | CondCodes,
90 rotated_imm, RN, false);
91 Cpsr = ~CondCodesMask & newCpsr;
92 CondCodes = CondCodesMask & newCpsr;
93 }});
94 }
95 0xa: PredOp::mrs_spsr({{ Rd = Spsr; }});
96 0xb: decode USEIMM {
97 // The mask field is the same as the RN index.
98 0: PredOp::msr_spsr_reg({{
99 Spsr = spsrWriteByInstr(Spsr, Rm, RN, false);
100 }});
101 1: PredImmOp::msr_spsr_imm({{
102 Spsr = spsrWriteByInstr(Spsr, rotated_imm,
103 RN, false);
104 }});
105 }
106 }
74 0x0: ArmMsrMrs::armMsrMrs();
107 0x1: decode OPCODE {
108 0x9: ArmBx::armBx();
109 0xb: PredOp::clz({{
110 Rd = ((Rm == 0) ? 32 : (31 - findMsbSet(Rm)));
111 }});
112 }
113 0x2: decode OPCODE {
114 0x9: WarnUnimpl::bxj();

--- 181 unchanged lines hidden --- 		75 0x1: decode OPCODE {
76 0x9: ArmBx::armBx();
77 0xb: PredOp::clz({{
78 Rd = ((Rm == 0) ? 32 : (31 - findMsbSet(Rm)));
79 }});
80 }
81 0x2: decode OPCODE {
82 0x9: WarnUnimpl::bxj();

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