arm.isa (7191:b2b54b8b3e5b) | arm.isa (7194:f72dc8789553) |
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1// -*- mode:c++ -*- 2 3// Copyright (c) 2010 ARM Limited 4// All rights reserved 5// 6// The license below extends only to copyright in the software and shall 7// not be construed as granting a license to any other intellectual 8// property including but not limited to intellectual property relating --- 144 unchanged lines hidden (view full) --- 153 Spsr = spsrWriteByInstr(Spsr, rotated_imm, RN, false); 154 }}); 155 } 156 } 157 0x2: AddrMode2::addrMode2(True); 158 0x3: decode OPCODE_4 { 159 0: AddrMode2::addrMode2(False); 160 1: decode OPCODE_24_23 { | 1// -*- mode:c++ -*- 2 3// Copyright (c) 2010 ARM Limited 4// All rights reserved 5// 6// The license below extends only to copyright in the software and shall 7// not be construed as granting a license to any other intellectual 8// property including but not limited to intellectual property relating --- 144 unchanged lines hidden (view full) --- 153 Spsr = spsrWriteByInstr(Spsr, rotated_imm, RN, false); 154 }}); 155 } 156 } 157 0x2: AddrMode2::addrMode2(True); 158 0x3: decode OPCODE_4 { 159 0: AddrMode2::addrMode2(False); 160 1: decode OPCODE_24_23 { |
161 0x0: WarnUnimpl::parallel_add_subtract_instructions(); | 161 0x0: ArmParallelAddSubtract::armParallelAddSubtract(); |
162 0x1: decode MEDIA_OPCODE { 163 0x8: decode MISC_OPCODE { 164 0x1, 0x9: WarnUnimpl::pkhbt(); 165 0x7: WarnUnimpl::sxtab16(); 166 0xb: WarnUnimpl::sel(); 167 0x5, 0xd: WarnUnimpl::pkhtb(); 168 0x3: WarnUnimpl::sign_zero_extend_add(); 169 } --- 142 unchanged lines hidden --- | 162 0x1: decode MEDIA_OPCODE { 163 0x8: decode MISC_OPCODE { 164 0x1, 0x9: WarnUnimpl::pkhbt(); 165 0x7: WarnUnimpl::sxtab16(); 166 0xb: WarnUnimpl::sel(); 167 0x5, 0xd: WarnUnimpl::pkhtb(); 168 0x3: WarnUnimpl::sign_zero_extend_add(); 169 } --- 142 unchanged lines hidden --- |