1// -*- mode:c++ -*-
2
3// Copyright (c) 2010 ARM Limited
4// All rights reserved
5//
6// The license below extends only to copyright in the software and shall
7// not be construed as granting a license to any other intellectual
8// property including but not limited to intellectual property relating

--- 79 unchanged lines hidden (view full) ---

88 0x14: WarnUnimpl::swpb();
89 0x18: WarnUnimpl::strex();
90 0x19: WarnUnimpl::ldrex();
91 }
92 }
93 0xb, 0xd, 0xf: AddrMode3::addrMode3();
94 }
95 0: decode IS_MISC {
96 0: ArmDataProcReg::armDataProcReg();
97 1: decode MISC_OPCODE {
98 0x0: decode OPCODE {
99 0x8: PredOp::mrs_cpsr({{
100 Rd = (Cpsr | CondCodes) & 0xF8FF03DF;
101 }});
102 0x9: decode USEIMM {
103 // The mask field is the same as the RN index.
104 0: PredOp::msr_cpsr_reg({{

--- 68 unchanged lines hidden (view full) ---

173 }}, none);
174 0xa: WarnUnimpl::smlaltt();
175 0xb: smultt({{ Rn = resTemp = sext<16>(Rm<31:16>) * sext<16>(Rs<31:16>); }}, none);
176 }
177 }
178 }
179 }
180 0x1: decode IS_MISC {
181 0: ArmDataProcImm::armDataProcImm();
182 1: decode OPCODE {
183 // The following two instructions aren't supposed to be defined
184 0x8: DataOp::movw({{ Rd = IMMED_11_0 | (RN << 12) ; }});
185 0x9: decode RN {
186 0: decode IMM {
187 0: PredImmOp::nop({{ ; }});
188 1: WarnUnimpl::yield();
189 2: WarnUnimpl::wfe();

--- 202 unchanged lines hidden ---