isa.hh (9461:67a6ba6604c8) | isa.hh (9553:2e1e5364dae3) |
---|---|
1/* 2 * Copyright (c) 2010 ARM Limited 3 * All rights reserved 4 * 5 * The license below extends only to copyright in the software and shall 6 * not be construed as granting a license to any other intellectual 7 * property including but not limited to intellectual property relating 8 * to a hardware implementation of the functionality of the software --- 181 unchanged lines hidden (view full) --- 190 DPRINTF(Checkpoint, "Unserializing Arm Misc Registers\n"); 191 UNSERIALIZE_ARRAY(miscRegs, NumMiscRegs); 192 CPSR tmp_cpsr = miscRegs[MISCREG_CPSR]; 193 updateRegMap(tmp_cpsr); 194 } 195 196 void startup(ThreadContext *tc) {} 197 | 1/* 2 * Copyright (c) 2010 ARM Limited 3 * All rights reserved 4 * 5 * The license below extends only to copyright in the software and shall 6 * not be construed as granting a license to any other intellectual 7 * property including but not limited to intellectual property relating 8 * to a hardware implementation of the functionality of the software --- 181 unchanged lines hidden (view full) --- 190 DPRINTF(Checkpoint, "Unserializing Arm Misc Registers\n"); 191 UNSERIALIZE_ARRAY(miscRegs, NumMiscRegs); 192 CPSR tmp_cpsr = miscRegs[MISCREG_CPSR]; 193 updateRegMap(tmp_cpsr); 194 } 195 196 void startup(ThreadContext *tc) {} 197 |
198 /// Explicitly import the otherwise hidden startup 199 using SimObject::startup; 200 |
|
198 typedef ArmISAParams Params; 199 200 const Params *params() const; 201 202 ISA(Params *p); 203 }; 204} 205 206#endif | 201 typedef ArmISAParams Params; 202 203 const Params *params() const; 204 205 ISA(Params *p); 206 }; 207} 208 209#endif |