isa.hh (13173:210b6fc57533) isa.hh (13393:659fdbcd5722)
1/*
2 * Copyright (c) 2010, 2012-2018 ARM Limited
3 * All rights reserved
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software

--- 398 unchanged lines hidden (view full) ---

407 CPSR cpsr M5_VAR_USED = readMiscReg(MISCREG_CPSR, tc);
408 assert(!cpsr.width);
409 }
410
411 public:
412 void clear();
413
414 protected:
1/*
2 * Copyright (c) 2010, 2012-2018 ARM Limited
3 * All rights reserved
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software

--- 398 unchanged lines hidden (view full) ---

407 CPSR cpsr M5_VAR_USED = readMiscReg(MISCREG_CPSR, tc);
408 assert(!cpsr.width);
409 }
410
411 public:
412 void clear();
413
414 protected:
415 void clear32(const ArmISAParams *p, const SCTLR &sctlr_rst);
415 void clear64(const ArmISAParams *p);
416 void initID32(const ArmISAParams *p);
417 void initID64(const ArmISAParams *p);
418
419 public:
420 MiscReg readMiscRegNoEffect(int misc_reg) const;
421 MiscReg readMiscReg(int misc_reg, ThreadContext *tc);
422 void setMiscRegNoEffect(int misc_reg, const MiscReg &val);

--- 280 unchanged lines hidden --- 		416 void clear64(const ArmISAParams *p);
417 void initID32(const ArmISAParams *p);
418 void initID64(const ArmISAParams *p);
419
420 public:
421 MiscReg readMiscRegNoEffect(int misc_reg) const;
422 MiscReg readMiscReg(int misc_reg, ThreadContext *tc);
423 void setMiscRegNoEffect(int misc_reg, const MiscReg &val);

--- 280 unchanged lines hidden ---