isa.hh (12604:0cf3d5d3bd3e) isa.hh (12605:16476b32138d)
1/*
2 * Copyright (c) 2010, 2012-2018 ARM Limited
3 * All rights reserved
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software

--- 377 unchanged lines hidden (view full) ---

386 assert(cpsr.width);
387 }
388
389 inline void assert64(ThreadContext *tc) {
390 CPSR cpsr M5_VAR_USED = readMiscReg(MISCREG_CPSR, tc);
391 assert(!cpsr.width);
392 }
393
1/*
2 * Copyright (c) 2010, 2012-2018 ARM Limited
3 * All rights reserved
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software

--- 377 unchanged lines hidden (view full) ---

386 assert(cpsr.width);
387 }
388
389 inline void assert64(ThreadContext *tc) {
390 CPSR cpsr M5_VAR_USED = readMiscReg(MISCREG_CPSR, tc);
391 assert(!cpsr.width);
392 }
393
394 void tlbiVA(ThreadContext *tc, MiscReg newVal, uint16_t asid,
395 bool secure_lookup, uint8_t target_el);
396
397 void tlbiALL(ThreadContext *tc, bool secure_lookup, uint8_t target_el);
398
399 void tlbiALLN(ThreadContext *tc, bool hyp, uint8_t target_el);
400
401 void tlbiMVA(ThreadContext *tc, MiscReg newVal, bool secure_lookup,
402 bool hyp, uint8_t target_el);
403
404 void tlbiIPA(ThreadContext *tc, MiscReg newVal, bool secure_lookup,
405 uint8_t target_el);
406
407 void tlbiASID(ThreadContext *tc, uint16_t asid, bool secure_lookup,
408 uint8_t target_el);
409
410 public:
411 void clear();
412 void clear64(const ArmISAParams *p);
413
414 MiscReg readMiscRegNoEffect(int misc_reg) const;
415 MiscReg readMiscReg(int misc_reg, ThreadContext *tc);
416 void setMiscRegNoEffect(int misc_reg, const MiscReg &val);
417 void setMiscReg(int misc_reg, const MiscReg &val, ThreadContext *tc);

--- 279 unchanged lines hidden --- 		394 public:
395 void clear();
396 void clear64(const ArmISAParams *p);
397
398 MiscReg readMiscRegNoEffect(int misc_reg) const;
399 MiscReg readMiscReg(int misc_reg, ThreadContext *tc);
400 void setMiscRegNoEffect(int misc_reg, const MiscReg &val);
401 void setMiscReg(int misc_reg, const MiscReg &val, ThreadContext *tc);

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