isa.hh (12478:604310e2d7ad) isa.hh (12479:c686e4a1fe8f)
1/*
2 * Copyright (c) 2010, 2012-2017 ARM Limited
3 * All rights reserved
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software

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39 *
40 * Authors: Gabe Black
41 */
42
43#ifndef __ARCH_ARM_ISA_HH__
44#define __ARCH_ARM_ISA_HH__
45
46#include "arch/arm/isa_device.hh"
1/*
2 * Copyright (c) 2010, 2012-2017 ARM Limited
3 * All rights reserved
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software

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39 *
40 * Authors: Gabe Black
41 */
42
43#ifndef __ARCH_ARM_ISA_HH__
44#define __ARCH_ARM_ISA_HH__
45
46#include "arch/arm/isa_device.hh"
47#include "arch/arm/miscregs.hh"
47#include "arch/arm/registers.hh"
48#include "arch/arm/system.hh"
49#include "arch/arm/tlb.hh"
50#include "arch/arm/types.hh"
51#include "arch/generic/traits.hh"
52#include "debug/Checkpoint.hh"
53#include "enums/VecRegRenameMode.hh"
54#include "sim/sim_object.hh"

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107 uint64_t res1() const { return _res1; }
108 uint64_t raz() const { return _raz; }
109 uint64_t rao() const { return _rao; }
110 // raz/rao implies writes ignored
111 uint64_t wi() const { return _raz | _rao; }
112 };
113
114 /** Metadata table accessible via the value of the register */
48#include "arch/arm/registers.hh"
49#include "arch/arm/system.hh"
50#include "arch/arm/tlb.hh"
51#include "arch/arm/types.hh"
52#include "arch/generic/traits.hh"
53#include "debug/Checkpoint.hh"
54#include "enums/VecRegRenameMode.hh"
55#include "sim/sim_object.hh"

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108 uint64_t res1() const { return _res1; }
109 uint64_t raz() const { return _raz; }
110 uint64_t rao() const { return _rao; }
111 // raz/rao implies writes ignored
112 uint64_t wi() const { return _raz | _rao; }
113 };
114
115 /** Metadata table accessible via the value of the register */
115 std::vector lookUpMiscReg;
116 static std::vector<struct MiscRegLUTEntry> lookUpMiscReg;
116
117 class MiscRegLUTEntryInitializer {
118 struct MiscRegLUTEntry &entry;
117
118 class MiscRegLUTEntryInitializer {
119 struct MiscRegLUTEntry &entry;
120 std::bitset<NUM_MISCREG_INFOS> &info;
119 typedef const MiscRegLUTEntryInitializer& chain;
120 public:
121 chain mapsTo(uint32_t l, uint32_t u = 0) const {
122 entry.lower = l;
123 entry.upper = u;
124 return *this;
125 }
126 chain res0(uint64_t mask) const {

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134 chain raz(uint64_t mask) const {
135 entry._raz = mask;
136 return *this;
137 }
138 chain rao(uint64_t mask) const {
139 entry._rao = mask;
140 return *this;
141 }
121 typedef const MiscRegLUTEntryInitializer& chain;
122 public:
123 chain mapsTo(uint32_t l, uint32_t u = 0) const {
124 entry.lower = l;
125 entry.upper = u;
126 return *this;
127 }
128 chain res0(uint64_t mask) const {

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136 chain raz(uint64_t mask) const {
137 entry._raz = mask;
138 return *this;
139 }
140 chain rao(uint64_t mask) const {
141 entry._rao = mask;
142 return *this;
143 }
142 MiscRegLUTEntryInitializer(struct MiscRegLUTEntry &e)
143 : entry(e)
144 {}
144 chain implemented(bool v = true) const {
145 info[MISCREG_IMPLEMENTED] = v;
146 return *this;
147 }
148 chain unimplemented() const {
149 return implemented(false);
150 }
151 chain unverifiable(bool v = true) const {
152 info[MISCREG_UNVERIFIABLE] = v;
153 return *this;
154 }
155 chain warnNotFail(bool v = true) const {
156 info[MISCREG_WARN_NOT_FAIL] = v;
157 return *this;
158 }
159 chain mutex(bool v = true) const {
160 info[MISCREG_MUTEX] = v;
161 return *this;
162 }
163 chain banked(bool v = true) const {
164 info[MISCREG_BANKED] = v;
165 return *this;
166 }
167 chain bankedChild(bool v = true) const {
168 info[MISCREG_BANKED_CHILD] = v;
169 return *this;
170 }
171 chain userNonSecureRead(bool v = true) const {
172 info[MISCREG_USR_NS_RD] = v;
173 return *this;
174 }
175 chain userNonSecureWrite(bool v = true) const {
176 info[MISCREG_USR_NS_WR] = v;
177 return *this;
178 }
179 chain userSecureRead(bool v = true) const {
180 info[MISCREG_USR_S_RD] = v;
181 return *this;
182 }
183 chain userSecureWrite(bool v = true) const {
184 info[MISCREG_USR_S_WR] = v;
185 return *this;
186 }
187 chain user(bool v = true) const {
188 userNonSecureRead(v);
189 userNonSecureWrite(v);
190 userSecureRead(v);
191 userSecureWrite(v);
192 return *this;
193 }
194 chain privNonSecureRead(bool v = true) const {
195 info[MISCREG_PRI_NS_RD] = v;
196 return *this;
197 }
198 chain privNonSecureWrite(bool v = true) const {
199 info[MISCREG_PRI_NS_WR] = v;
200 return *this;
201 }
202 chain privSecureRead(bool v = true) const {
203 info[MISCREG_PRI_S_RD] = v;
204 return *this;
205 }
206 chain privSecureWrite(bool v = true) const {
207 info[MISCREG_PRI_S_WR] = v;
208 return *this;
209 }
210 chain privSecure(bool v = true) const {
211 privSecureRead(v);
212 privSecureWrite(v);
213 return *this;
214 }
215 chain hypRead(bool v = true) const {
216 info[MISCREG_HYP_RD] = v;
217 return *this;
218 }
219 chain hypWrite(bool v = true) const {
220 info[MISCREG_HYP_WR] = v;
221 return *this;
222 }
223 chain hyp(bool v = true) const {
224 hypRead(v);
225 hypWrite(v);
226 return *this;
227 }
228 chain monSecureRead(bool v = true) const {
229 info[MISCREG_MON_NS0_RD] = v;
230 return *this;
231 }
232 chain monSecureWrite(bool v = true) const {
233 info[MISCREG_MON_NS0_WR] = v;
234 return *this;
235 }
236 chain monNonSecureRead(bool v = true) const {
237 info[MISCREG_MON_NS1_RD] = v;
238 return *this;
239 }
240 chain monNonSecureWrite(bool v = true) const {
241 info[MISCREG_MON_NS1_WR] = v;
242 return *this;
243 }
244 chain mon(bool v = true) const {
245 monSecureRead(v);
246 monSecureWrite(v);
247 monNonSecureRead(v);
248 monNonSecureWrite(v);
249 return *this;
250 }
251 chain monSecure(bool v = true) const {
252 monSecureRead(v);
253 monSecureWrite(v);
254 return *this;
255 }
256 chain monNonSecure(bool v = true) const {
257 monNonSecureRead(v);
258 monNonSecureWrite(v);
259 return *this;
260 }
261 chain allPrivileges(bool v = true) const {
262 userNonSecureRead(v);
263 userNonSecureWrite(v);
264 userSecureRead(v);
265 userSecureWrite(v);
266 privNonSecureRead(v);
267 privNonSecureWrite(v);
268 privSecureRead(v);
269 privSecureWrite(v);
270 hypRead(v);
271 hypWrite(v);
272 monSecureRead(v);
273 monSecureWrite(v);
274 monNonSecureRead(v);
275 monNonSecureWrite(v);
276 return *this;
277 }
278 chain nonSecure(bool v = true) const {
279 userNonSecureRead(v);
280 userNonSecureWrite(v);
281 privNonSecureRead(v);
282 privNonSecureWrite(v);
283 hypRead(v);
284 hypWrite(v);
285 monNonSecureRead(v);
286 monNonSecureWrite(v);
287 return *this;
288 }
289 chain secure(bool v = true) const {
290 userSecureRead(v);
291 userSecureWrite(v);
292 privSecureRead(v);
293 privSecureWrite(v);
294 monSecureRead(v);
295 monSecureWrite(v);
296 return *this;
297 }
298 chain reads(bool v) const {
299 userNonSecureRead(v);
300 userSecureRead(v);
301 privNonSecureRead(v);
302 privSecureRead(v);
303 hypRead(v);
304 monSecureRead(v);
305 monNonSecureRead(v);
306 return *this;
307 }
308 chain writes(bool v) const {
309 userNonSecureWrite(v);
310 userSecureWrite(v);
311 privNonSecureWrite(v);
312 privSecureWrite(v);
313 hypWrite(v);
314 monSecureWrite(v);
315 monNonSecureWrite(v);
316 return *this;
317 }
318 chain exceptUserMode() const {
319 user(0);
320 return *this;
321 }
322 MiscRegLUTEntryInitializer(struct MiscRegLUTEntry &e,
323 std::bitset<NUM_MISCREG_INFOS> &i)
324 : entry(e),
325 info(i)
326 {
327 // force unimplemented registers to be thusly declared
328 implemented(1);
329 }
145 };
146
147 const MiscRegLUTEntryInitializer InitReg(uint32_t reg) {
330 };
331
332 const MiscRegLUTEntryInitializer InitReg(uint32_t reg) {
148 return MiscRegLUTEntryInitializer(lookUpMiscReg[reg]);
333 return MiscRegLUTEntryInitializer(lookUpMiscReg[reg],
334 miscRegInfo[reg]);
149 }
150
151 void initializeMiscRegMetadata();
152
153 MiscReg miscRegs[NumMiscRegs];
154 const IntRegIndex *intRegMap;
155
156 void

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335 }
336
337 void initializeMiscRegMetadata();
338
339 MiscReg miscRegs[NumMiscRegs];
340 const IntRegIndex *intRegMap;
341
342 void

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