isa.hh (12109:f29e9c5418aa) | isa.hh (12477:3d6c49bc7290) |
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1/* | 1/* |
2 * Copyright (c) 2010, 2012-2016 ARM Limited | 2 * Copyright (c) 2010, 2012-2017 ARM Limited |
3 * All rights reserved 4 * 5 * The license below extends only to copyright in the software and shall 6 * not be construed as granting a license to any other intellectual 7 * property including but not limited to intellectual property relating 8 * to a hardware implementation of the functionality of the software 9 * licensed hereunder. You may use the software subject to the license 10 * terms below provided that you ensure that this notice is replicated --- 75 unchanged lines hidden (view full) --- 86 bool haveSecurity; 87 bool haveLPAE; 88 bool haveVirtualization; 89 bool haveLargeAsid64; 90 uint8_t physAddrRange64; 91 92 /** Register translation entry used in lookUpMiscReg */ 93 struct MiscRegLUTEntry { | 3 * All rights reserved 4 * 5 * The license below extends only to copyright in the software and shall 6 * not be construed as granting a license to any other intellectual 7 * property including but not limited to intellectual property relating 8 * to a hardware implementation of the functionality of the software 9 * licensed hereunder. You may use the software subject to the license 10 * terms below provided that you ensure that this notice is replicated --- 75 unchanged lines hidden (view full) --- 86 bool haveSecurity; 87 bool haveLPAE; 88 bool haveVirtualization; 89 bool haveLargeAsid64; 90 uint8_t physAddrRange64; 91 92 /** Register translation entry used in lookUpMiscReg */ 93 struct MiscRegLUTEntry { |
94 uint32_t lower; 95 uint32_t upper; | 94 uint32_t lower; // Lower half mapped to this register 95 uint32_t upper; // Upper half mapped to this register |
96 }; 97 | 96 }; 97 |
98 struct MiscRegInitializerEntry { 99 uint32_t index; 100 struct MiscRegLUTEntry entry; | 98 /** Metadata table accessible via the value of the register */ 99 std::vector<struct MiscRegLUTEntry> lookUpMiscReg; 100 101 class MiscRegLUTEntryInitializer { 102 struct MiscRegLUTEntry &entry; 103 typedef const MiscRegLUTEntryInitializer& chain; 104 public: 105 chain mapsTo(uint32_t l, uint32_t u = 0) const { 106 entry.lower = l; 107 entry.upper = u; 108 return *this; 109 } 110 MiscRegLUTEntryInitializer(struct MiscRegLUTEntry &e) 111 : entry(e) 112 {} |
101 }; 102 | 113 }; 114 |
103 /** Register table noting all translations */ 104 static const struct MiscRegInitializerEntry MiscRegSwitch[]; | 115 const MiscRegLUTEntryInitializer InitReg(uint32_t reg) { 116 return MiscRegLUTEntryInitializer(lookUpMiscReg[reg]); 117 } |
105 | 118 |
106 /** Translation table accessible via the value of the register */ 107 std::vector<struct MiscRegLUTEntry> lookUpMiscReg; | 119 void initializeMiscRegMetadata(); |
108 109 MiscReg miscRegs[NumMiscRegs]; 110 const IntRegIndex *intRegMap; 111 112 void 113 updateRegMap(CPSR cpsr) 114 { 115 if (cpsr.width == 0) { --- 345 unchanged lines hidden --- | 120 121 MiscReg miscRegs[NumMiscRegs]; 122 const IntRegIndex *intRegMap; 123 124 void 125 updateRegMap(CPSR cpsr) 126 { 127 if (cpsr.width == 0) { --- 345 unchanged lines hidden --- |