1/* 2 * Copyright (c) 2010 ARM Limited 3 * All rights reserved 4 * 5 * The license below extends only to copyright in the software and shall 6 * not be construed as granting a license to any other intellectual 7 * property including but not limited to intellectual property relating 8 * to a hardware implementation of the functionality of the software --- 78 unchanged lines hidden (view full) --- 87 default: 88 panic("Unrecognized mode setting in CPSR.\n"); 89 } 90 } 91 92 public: 93 void clear() 94 { |
95 SCTLR sctlr_rst = miscRegs[MISCREG_SCTLR_RST]; 96 |
97 memset(miscRegs, 0, sizeof(miscRegs)); 98 CPSR cpsr = 0; 99 cpsr.mode = MODE_USER; 100 miscRegs[MISCREG_CPSR] = cpsr; 101 updateRegMap(cpsr); 102 103 SCTLR sctlr = 0; |
104 sctlr.nmfi = (bool)sctlr_rst.nmfi; 105 sctlr.v = (bool)sctlr_rst.v; 106 sctlr.u = 1; |
107 sctlr.rao1 = 1; 108 sctlr.rao2 = 1; 109 sctlr.rao3 = 1; 110 sctlr.rao4 = 1; 111 miscRegs[MISCREG_SCTLR] = sctlr; |
112 miscRegs[MISCREG_SCTLR_RST] = sctlr_rst; |
113 |
114 |
115 /* 116 * Technically this should be 0, but we don't support those 117 * settings. 118 */ 119 CPACR cpacr = 0; 120 // Enable CP 10, 11 121 cpacr.cp10 = 0x3; 122 cpacr.cp11 = 0x3; --- 205 unchanged lines hidden (view full) --- 328 break; 329 case MISCREG_FPEXC: 330 { 331 const uint32_t fpexcMask = 0x60000000; 332 newVal = (newVal & fpexcMask) | 333 (miscRegs[MISCREG_FPEXC] & ~fpexcMask); 334 } 335 break; |
336 case MISCREG_SCTLR: 337 { 338 SCTLR sctlr = miscRegs[MISCREG_SCTLR]; 339 SCTLR new_sctlr = newVal; 340 new_sctlr.nmfi = (bool)sctlr.nmfi; 341 miscRegs[MISCREG_SCTLR] = (MiscReg)new_sctlr; 342 return; 343 } |
344 case MISCREG_TLBTR: 345 case MISCREG_MVFR0: 346 case MISCREG_MVFR1: 347 case MISCREG_MPIDR: 348 case MISCREG_FPSID: 349 return; 350 } |
351 setMiscRegNoEffect(misc_reg, newVal); |
352 } 353 354 int 355 flattenIntIndex(int reg) 356 { 357 assert(reg >= 0); 358 if (reg < NUM_ARCH_INTREGS) { 359 return intRegMap[reg]; --- 33 unchanged lines hidden (view full) --- 393 void serialize(EventManager *em, std::ostream &os) 394 {} 395 void unserialize(EventManager *em, Checkpoint *cp, 396 const std::string §ion) 397 {} 398 399 ISA() 400 { |
401 SCTLR sctlr; 402 sctlr = 0; 403 miscRegs[MISCREG_SCTLR_RST] = sctlr; 404 |
405 clear(); 406 } 407 }; 408} 409 410#endif |