1/* 2 * Copyright (c) 2010 ARM Limited 3 * All rights reserved 4 * 5 * The license below extends only to copyright in the software and shall 6 * not be construed as granting a license to any other intellectual 7 * property including but not limited to intellectual property relating 8 * to a hardware implementation of the functionality of the software --- 150 unchanged lines hidden (view full) --- 159 cpsr.t = 0; 160 return cpsr; 161 } 162 if (misc_reg >= MISCREG_CP15_UNIMP_START && 163 misc_reg < MISCREG_CP15_END) { 164 panic("Unimplemented CP15 register %s read.\n", 165 miscRegName[misc_reg]); 166 } |
167 switch (misc_reg) { 168 case MISCREG_CLIDR: 169 warn("The clidr register always reports 0 caches.\n"); 170 break; 171 } |
172 return readMiscRegNoEffect(misc_reg); 173 } 174 175 void 176 setMiscRegNoEffect(int misc_reg, const MiscReg &val) 177 { 178 assert(misc_reg < NumMiscRegs); 179 if (misc_reg == MISCREG_SPSR) { --- 97 unchanged lines hidden --- |