2c2
< * Copyright (c) 2010, 2012-2016 ARM Limited
---
> * Copyright (c) 2010, 2012-2017 ARM Limited
94,95c94,95
< uint32_t lower;
< uint32_t upper;
---
> uint32_t lower; // Lower half mapped to this register
> uint32_t upper; // Upper half mapped to this register
98,100c98,112
< struct MiscRegInitializerEntry {
< uint32_t index;
< struct MiscRegLUTEntry entry;
---
> /** Metadata table accessible via the value of the register */
> std::vector<struct MiscRegLUTEntry> lookUpMiscReg;
>
> class MiscRegLUTEntryInitializer {
> struct MiscRegLUTEntry &entry;
> typedef const MiscRegLUTEntryInitializer& chain;
> public:
> chain mapsTo(uint32_t l, uint32_t u = 0) const {
> entry.lower = l;
> entry.upper = u;
> return *this;
> }
> MiscRegLUTEntryInitializer(struct MiscRegLUTEntry &e)
> : entry(e)
> {}
103,104c115,117
< /** Register table noting all translations */
< static const struct MiscRegInitializerEntry MiscRegSwitch[];
---
> const MiscRegLUTEntryInitializer InitReg(uint32_t reg) {
> return MiscRegLUTEntryInitializer(lookUpMiscReg[reg]);
> }
106,107c119
< /** Translation table accessible via the value of the register */
< std::vector<struct MiscRegLUTEntry> lookUpMiscReg;
---
> void initializeMiscRegMetadata();