1/*
2 * Copyright (c) 2010, 2012-2015 ARM Limited
3 * All rights reserved
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software

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45
46#include "arch/arm/isa_device.hh"
47#include "arch/arm/registers.hh"
48#include "arch/arm/system.hh"
49#include "arch/arm/tlb.hh"
50#include "arch/arm/types.hh"
51#include "debug/Checkpoint.hh"
52#include "sim/sim_object.hh"
53
54struct ArmISAParams;
55struct DummyArmISADeviceParams;
56class ThreadContext;
57class Checkpoint;
58class EventManager;
59
60namespace ArmISA

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127 };
128
129 class ISA : public SimObject
130 {
131 protected:
132 // Parent system
133 ArmSystem *system;
134
135 /** Dummy device for to handle non-existing ISA devices */
136 DummyISADevice dummyDevice;
137
138 // PMU belonging to this ISA
139 BaseISADevice *pmu;
140
141 // Generic timer interface belonging to this ISA
142 std::unique_ptr<BaseISADevice> timer;

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424 UNSERIALIZE_SCALAR(haveLPAE);
425 UNSERIALIZE_SCALAR(haveVirtualization);
426 UNSERIALIZE_SCALAR(haveLargeAsid64);
427 UNSERIALIZE_SCALAR(physAddrRange64);
428 }
429
430 void startup(ThreadContext *tc) {}
431
432 /// Explicitly import the otherwise hidden startup
433 using SimObject::startup;
434
435 typedef ArmISAParams Params;
436
437 const Params *params() const;
438
439 ISA(Params *p);
440 };
441}
442
443#endif