isa.cc (9374:227a38f9d98c) isa.cc (9377:6f294e7a93d1)
1/*
2 * Copyright (c) 2010-2012 ARM Limited
3 * All rights reserved
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software

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376 fpscrMask.ahp = ones;
377 fpscrMask.qc = ones;
378 fpscrMask.v = ones;
379 fpscrMask.c = ones;
380 fpscrMask.z = ones;
381 fpscrMask.n = ones;
382 newVal = (newVal & (uint32_t)fpscrMask) |
383 (miscRegs[MISCREG_FPSCR] & ~(uint32_t)fpscrMask);
1/*
2 * Copyright (c) 2010-2012 ARM Limited
3 * All rights reserved
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software

--- 367 unchanged lines hidden (view full) ---

376 fpscrMask.ahp = ones;
377 fpscrMask.qc = ones;
378 fpscrMask.v = ones;
379 fpscrMask.c = ones;
380 fpscrMask.z = ones;
381 fpscrMask.n = ones;
382 newVal = (newVal & (uint32_t)fpscrMask) |
383 (miscRegs[MISCREG_FPSCR] & ~(uint32_t)fpscrMask);
384 tc->getDecodePtr()->setContext(newVal);
384 tc->getDecoderPtr()->setContext(newVal);
385 }
386 break;
387 case MISCREG_CPSR_Q:
388 {
389 assert(!(newVal & ~CpsrMaskQ));
390 newVal = miscRegs[MISCREG_CPSR] | newVal;
391 misc_reg = MISCREG_CPSR;
392 }

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386 break;
387 case MISCREG_CPSR_Q:
388 {
389 assert(!(newVal & ~CpsrMaskQ));
390 newVal = miscRegs[MISCREG_CPSR] | newVal;
391 misc_reg = MISCREG_CPSR;
392 }

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