isa.cc (8868:26dbd171754e) isa.cc (8870:f95c4042f2d0)
1/*
2 * Copyright (c) 2010-2012 ARM Limited
3 * All rights reserved
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software

--- 199 unchanged lines hidden (view full) ---

208 warn_once("The ccsidr register isn't implemented and "
209 "always reads as 0.\n");
210 break;
211 case MISCREG_ID_PFR0:
212 warn("Returning thumbEE disabled for now since we don't support CP14"
213 "config registers and jumping to ThumbEE vectors\n");
214 return 0x0031; // !ThumbEE | !Jazelle | Thumb | ARM
215 case MISCREG_ID_PFR1:
1/*
2 * Copyright (c) 2010-2012 ARM Limited
3 * All rights reserved
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software

--- 199 unchanged lines hidden (view full) ---

208 warn_once("The ccsidr register isn't implemented and "
209 "always reads as 0.\n");
210 break;
211 case MISCREG_ID_PFR0:
212 warn("Returning thumbEE disabled for now since we don't support CP14"
213 "config registers and jumping to ThumbEE vectors\n");
214 return 0x0031; // !ThumbEE | !Jazelle | Thumb | ARM
215 case MISCREG_ID_PFR1:
216 warn("reading unimplmented register ID_PFR1");
217 return 0;
216 return 0x00001; // !Timer | !Virti | !M Profile | !TrustZone | ARMv4
218 case MISCREG_CTR:
219 return 0x86468006; // V7, 64 byte cache line, load/exclusive is exact
220 case MISCREG_ACTLR:
221 warn("Not doing anything for miscreg ACTLR\n");
222 break;
223 case MISCREG_PMCR:
224 case MISCREG_PMCCNTR:
225 case MISCREG_PMSELR:

--- 390 unchanged lines hidden --- 		217 case MISCREG_CTR:
218 return 0x86468006; // V7, 64 byte cache line, load/exclusive is exact
219 case MISCREG_ACTLR:
220 warn("Not doing anything for miscreg ACTLR\n");
221 break;
222 case MISCREG_PMCR:
223 case MISCREG_PMCCNTR:
224 case MISCREG_PMSELR:

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