isa.cc (8147:ac8ef72e9700) isa.cc (8205:7ecbffb674aa)
1/*
2 * Copyright (c) 2010 ARM Limited
3 * All rights reserved
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software

--- 252 unchanged lines hidden (view full) ---

261 pc.nextJazelle(cpsr.j);
262 tc->pcState(pc);
263 } else if (misc_reg >= MISCREG_CP15_UNIMP_START &&
264 misc_reg < MISCREG_CP15_END) {
265 panic("Unimplemented CP15 register %s wrote with %#x.\n",
266 miscRegName[misc_reg], val);
267 } else {
268 switch (misc_reg) {
1/*
2 * Copyright (c) 2010 ARM Limited
3 * All rights reserved
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software

--- 252 unchanged lines hidden (view full) ---

261 pc.nextJazelle(cpsr.j);
262 tc->pcState(pc);
263 } else if (misc_reg >= MISCREG_CP15_UNIMP_START &&
264 misc_reg < MISCREG_CP15_END) {
265 panic("Unimplemented CP15 register %s wrote with %#x.\n",
266 miscRegName[misc_reg], val);
267 } else {
268 switch (misc_reg) {
269 case MISCREG_ITSTATE:
270 {
271 ITSTATE itstate = newVal;
272 CPSR cpsr = miscRegs[MISCREG_CPSR];
273 cpsr.it1 = itstate.bottom2;
274 cpsr.it2 = itstate.top6;
275 miscRegs[MISCREG_CPSR] = cpsr;
276 DPRINTF(MiscRegs,
277 "Updating ITSTATE -> %#x in CPSR -> %#x.\n",
278 (uint8_t)itstate, (uint32_t)cpsr);
279 }
280 break;
281 case MISCREG_CPACR:
282 {
283 CPACR newCpacr = 0;
284 CPACR valCpacr = val;
285 newCpacr.cp10 = valCpacr.cp10;
286 newCpacr.cp11 = valCpacr.cp11;
287 //XXX d32dis isn't implemented. The manual says whether or not
288 //it works is implementation defined.

--- 203 unchanged lines hidden --- 		269 case MISCREG_CPACR:
270 {
271 CPACR newCpacr = 0;
272 CPACR valCpacr = val;
273 newCpacr.cp10 = valCpacr.cp10;
274 newCpacr.cp11 = valCpacr.cp11;
275 //XXX d32dis isn't implemented. The manual says whether or not
276 //it works is implementation defined.

--- 203 unchanged lines hidden ---