isa.cc (8059:3bf9cdcfc4ee) isa.cc (8147:ac8ef72e9700)
1/*
2 * Copyright (c) 2010 ARM Limited
3 * All rights reserved
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software

--- 129 unchanged lines hidden (view full) ---

138 (0 << 8) | // 9:8
139 (3 << 6) | // 7:6
140 (2 << 4) | // 5:4
141 (0 << 2) | // 3:2
142 0; // 1:0
143
144 miscRegs[MISCREG_CPACR] = 0;
145 miscRegs[MISCREG_FPSID] = 0x410430A0;
1/*
2 * Copyright (c) 2010 ARM Limited
3 * All rights reserved
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software

--- 129 unchanged lines hidden (view full) ---

138 (0 << 8) | // 9:8
139 (3 << 6) | // 7:6
140 (2 << 4) | // 5:4
141 (0 << 2) | // 3:2
142 0; // 1:0
143
144 miscRegs[MISCREG_CPACR] = 0;
145 miscRegs[MISCREG_FPSID] = 0x410430A0;
146
147 // See section B4.1.84 of ARM ARM
148 // All values are latest for ARMv7-A profile
149 miscRegs[MISCREG_ID_ISAR0] = 0x01101111;
150 miscRegs[MISCREG_ID_ISAR1] = 0x02112111;
151 miscRegs[MISCREG_ID_ISAR2] = 0x21232141;
152 miscRegs[MISCREG_ID_ISAR3] = 0x01112131;
153 miscRegs[MISCREG_ID_ISAR4] = 0x10010142;
154 miscRegs[MISCREG_ID_ISAR5] = 0x00000000;
155
146 //XXX We need to initialize the rest of the state.
147}
148
149MiscReg
150ISA::readMiscRegNoEffect(int misc_reg)
151{
152 assert(misc_reg < NumMiscRegs);
153

--- 328 unchanged lines hidden --- 		156 //XXX We need to initialize the rest of the state.
157}
158
159MiscReg
160ISA::readMiscRegNoEffect(int misc_reg)
161{
162 assert(misc_reg < NumMiscRegs);
163

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