isa.cc (7588:d6c8516b49e9) isa.cc (7604:9ac39aa78c33)
1/*
2 * Copyright (c) 2010 ARM Limited
3 * All rights reserved
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software

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50
51 memset(miscRegs, 0, sizeof(miscRegs));
52 CPSR cpsr = 0;
53 cpsr.mode = MODE_USER;
54 miscRegs[MISCREG_CPSR] = cpsr;
55 updateRegMap(cpsr);
56
57 SCTLR sctlr = 0;
1/*
2 * Copyright (c) 2010 ARM Limited
3 * All rights reserved
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software

--- 41 unchanged lines hidden (view full) ---

50
51 memset(miscRegs, 0, sizeof(miscRegs));
52 CPSR cpsr = 0;
53 cpsr.mode = MODE_USER;
54 miscRegs[MISCREG_CPSR] = cpsr;
55 updateRegMap(cpsr);
56
57 SCTLR sctlr = 0;
58 sctlr.te = (bool)sctlr_rst.te;
58 sctlr.nmfi = (bool)sctlr_rst.nmfi;
59 sctlr.v = (bool)sctlr_rst.v;
60 sctlr.u = 1;
61 sctlr.xp = 1;
62 sctlr.rao2 = 1;
63 sctlr.rao3 = 1;
64 sctlr.rao4 = 1;
65 miscRegs[MISCREG_SCTLR] = sctlr;

--- 416 unchanged lines hidden --- 		59 sctlr.nmfi = (bool)sctlr_rst.nmfi;
60 sctlr.v = (bool)sctlr_rst.v;
61 sctlr.u = 1;
62 sctlr.xp = 1;
63 sctlr.rao2 = 1;
64 sctlr.rao3 = 1;
65 sctlr.rao4 = 1;
66 miscRegs[MISCREG_SCTLR] = sctlr;

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