isa.cc (14133:f3e7e7c3803d) | isa.cc (14228:8c1143372c76) |
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1/* 2 * Copyright (c) 2010-2019 ARM Limited 3 * All rights reserved 4 * 5 * The license below extends only to copyright in the software and shall 6 * not be construed as granting a license to any other intellectual 7 * property including but not limited to intellectual property relating 8 * to a hardware implementation of the functionality of the software --- 723 unchanged lines hidden (view full) --- 732 case MISCREG_CNTHV_CVAL_EL2: 733 case MISCREG_CNTHV_TVAL_EL2: 734 case MISCREG_CNTFRQ ... MISCREG_CNTHP_CTL: 735 case MISCREG_CNTPCT ... MISCREG_CNTHP_CVAL: 736 case MISCREG_CNTKCTL_EL1 ... MISCREG_CNTV_CVAL_EL0: 737 case MISCREG_CNTVOFF_EL2 ... MISCREG_CNTPS_CVAL_EL1: 738 return getGenericTimer(tc).readMiscReg(misc_reg); 739 | 1/* 2 * Copyright (c) 2010-2019 ARM Limited 3 * All rights reserved 4 * 5 * The license below extends only to copyright in the software and shall 6 * not be construed as granting a license to any other intellectual 7 * property including but not limited to intellectual property relating 8 * to a hardware implementation of the functionality of the software --- 723 unchanged lines hidden (view full) --- 732 case MISCREG_CNTHV_CVAL_EL2: 733 case MISCREG_CNTHV_TVAL_EL2: 734 case MISCREG_CNTFRQ ... MISCREG_CNTHP_CTL: 735 case MISCREG_CNTPCT ... MISCREG_CNTHP_CVAL: 736 case MISCREG_CNTKCTL_EL1 ... MISCREG_CNTV_CVAL_EL0: 737 case MISCREG_CNTVOFF_EL2 ... MISCREG_CNTPS_CVAL_EL1: 738 return getGenericTimer(tc).readMiscReg(misc_reg); 739 |
740 case MISCREG_ICC_AP0R0 ... MISCREG_ICH_LRC15: |
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740 case MISCREG_ICC_PMR_EL1 ... MISCREG_ICC_IGRPEN1_EL3: 741 case MISCREG_ICH_AP0R0_EL2 ... MISCREG_ICH_LR15_EL2: 742 return getGICv3CPUInterface(tc).readMiscReg(misc_reg); 743 744 default: 745 break; 746 747 } --- 1316 unchanged lines hidden (view full) --- 2064 case MISCREG_CNTHV_CVAL_EL2: 2065 case MISCREG_CNTHV_TVAL_EL2: 2066 case MISCREG_CNTFRQ ... MISCREG_CNTHP_CTL: 2067 case MISCREG_CNTPCT ... MISCREG_CNTHP_CVAL: 2068 case MISCREG_CNTKCTL_EL1 ... MISCREG_CNTV_CVAL_EL0: 2069 case MISCREG_CNTVOFF_EL2 ... MISCREG_CNTPS_CVAL_EL1: 2070 getGenericTimer(tc).setMiscReg(misc_reg, newVal); 2071 break; | 741 case MISCREG_ICC_PMR_EL1 ... MISCREG_ICC_IGRPEN1_EL3: 742 case MISCREG_ICH_AP0R0_EL2 ... MISCREG_ICH_LR15_EL2: 743 return getGICv3CPUInterface(tc).readMiscReg(misc_reg); 744 745 default: 746 break; 747 748 } --- 1316 unchanged lines hidden (view full) --- 2065 case MISCREG_CNTHV_CVAL_EL2: 2066 case MISCREG_CNTHV_TVAL_EL2: 2067 case MISCREG_CNTFRQ ... MISCREG_CNTHP_CTL: 2068 case MISCREG_CNTPCT ... MISCREG_CNTHP_CVAL: 2069 case MISCREG_CNTKCTL_EL1 ... MISCREG_CNTV_CVAL_EL0: 2070 case MISCREG_CNTVOFF_EL2 ... MISCREG_CNTPS_CVAL_EL1: 2071 getGenericTimer(tc).setMiscReg(misc_reg, newVal); 2072 break; |
2073 case MISCREG_ICC_AP0R0 ... MISCREG_ICH_LRC15: |
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2072 case MISCREG_ICC_PMR_EL1 ... MISCREG_ICC_IGRPEN1_EL3: 2073 case MISCREG_ICH_AP0R0_EL2 ... MISCREG_ICH_LR15_EL2: 2074 getGICv3CPUInterface(tc).setMiscReg(misc_reg, newVal); 2075 return; 2076 case MISCREG_ZCR_EL3: 2077 case MISCREG_ZCR_EL2: 2078 case MISCREG_ZCR_EL1: 2079 tc->getDecoderPtr()->setSveLen( --- 95 unchanged lines hidden --- | 2074 case MISCREG_ICC_PMR_EL1 ... MISCREG_ICC_IGRPEN1_EL3: 2075 case MISCREG_ICH_AP0R0_EL2 ... MISCREG_ICH_LR15_EL2: 2076 getGICv3CPUInterface(tc).setMiscReg(misc_reg, newVal); 2077 return; 2078 case MISCREG_ZCR_EL3: 2079 case MISCREG_ZCR_EL2: 2080 case MISCREG_ZCR_EL1: 2081 tc->getDecoderPtr()->setSveLen( --- 95 unchanged lines hidden --- |