isa.cc (13417:d5030340d89a) | isa.cc (13499:7f9d435bac22) |
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1/* 2 * Copyright (c) 2010-2018 ARM Limited 3 * All rights reserved 4 * 5 * The license below extends only to copyright in the software and shall 6 * not be construed as granting a license to any other intellectual 7 * property including but not limited to intellectual property relating 8 * to a hardware implementation of the functionality of the software --- 75 unchanged lines hidden (view full) --- 84 haveLPAE = system->haveLPAE(); 85 haveCrypto = system->haveCrypto(); 86 haveVirtualization = system->haveVirtualization(); 87 haveLargeAsid64 = system->haveLargeAsid64(); 88 physAddrRange = system->physAddrRange(); 89 } else { 90 highestELIs64 = true; // ArmSystem::highestELIs64 does the same 91 haveSecurity = haveLPAE = haveVirtualization = false; | 1/* 2 * Copyright (c) 2010-2018 ARM Limited 3 * All rights reserved 4 * 5 * The license below extends only to copyright in the software and shall 6 * not be construed as granting a license to any other intellectual 7 * property including but not limited to intellectual property relating 8 * to a hardware implementation of the functionality of the software --- 75 unchanged lines hidden (view full) --- 84 haveLPAE = system->haveLPAE(); 85 haveCrypto = system->haveCrypto(); 86 haveVirtualization = system->haveVirtualization(); 87 haveLargeAsid64 = system->haveLargeAsid64(); 88 physAddrRange = system->physAddrRange(); 89 } else { 90 highestELIs64 = true; // ArmSystem::highestELIs64 does the same 91 haveSecurity = haveLPAE = haveVirtualization = false; |
92 haveCrypto = false; | 92 haveCrypto = true; |
93 haveLargeAsid64 = false; 94 physAddrRange = 32; // dummy value 95 } 96 97 initializeMiscRegMetadata(); 98 preUnflattenMiscReg(); 99 100 clear(); --- 209 unchanged lines hidden (view full) --- 310 miscRegs[MISCREG_ID_ISAR3] = p->id_isar3; 311 miscRegs[MISCREG_ID_ISAR4] = p->id_isar4; 312 miscRegs[MISCREG_ID_ISAR5] = p->id_isar5; 313 314 miscRegs[MISCREG_ID_MMFR0] = p->id_mmfr0; 315 miscRegs[MISCREG_ID_MMFR1] = p->id_mmfr1; 316 miscRegs[MISCREG_ID_MMFR2] = p->id_mmfr2; 317 miscRegs[MISCREG_ID_MMFR3] = p->id_mmfr3; | 93 haveLargeAsid64 = false; 94 physAddrRange = 32; // dummy value 95 } 96 97 initializeMiscRegMetadata(); 98 preUnflattenMiscReg(); 99 100 clear(); --- 209 unchanged lines hidden (view full) --- 310 miscRegs[MISCREG_ID_ISAR3] = p->id_isar3; 311 miscRegs[MISCREG_ID_ISAR4] = p->id_isar4; 312 miscRegs[MISCREG_ID_ISAR5] = p->id_isar5; 313 314 miscRegs[MISCREG_ID_MMFR0] = p->id_mmfr0; 315 miscRegs[MISCREG_ID_MMFR1] = p->id_mmfr1; 316 miscRegs[MISCREG_ID_MMFR2] = p->id_mmfr2; 317 miscRegs[MISCREG_ID_MMFR3] = p->id_mmfr3; |
318 319 miscRegs[MISCREG_ID_ISAR5] = insertBits( 320 miscRegs[MISCREG_ID_ISAR5], 19, 4, 321 haveCrypto ? 0x1112 : 0x0); |
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318} 319 320void 321ISA::initID64(const ArmISAParams *p) 322{ 323 // Initialize configurable id registers 324 miscRegs[MISCREG_ID_AA64AFR0_EL1] = p->id_aa64afr0_el1; 325 miscRegs[MISCREG_ID_AA64AFR1_EL1] = p->id_aa64afr1_el1; --- 1681 unchanged lines hidden --- | 322} 323 324void 325ISA::initID64(const ArmISAParams *p) 326{ 327 // Initialize configurable id registers 328 miscRegs[MISCREG_ID_AA64AFR0_EL1] = p->id_aa64afr0_el1; 329 miscRegs[MISCREG_ID_AA64AFR1_EL1] = p->id_aa64afr1_el1; --- 1681 unchanged lines hidden --- |