isa.cc (12666:bea22b5e6cf7) | isa.cc (12667:1b939161dcb8) |
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1/* | 1/* |
2 * Copyright (c) 2010-2017 ARM Limited | 2 * Copyright (c) 2010-2018 ARM Limited |
3 * All rights reserved 4 * 5 * The license below extends only to copyright in the software and shall 6 * not be construed as granting a license to any other intellectual 7 * property including but not limited to intellectual property relating 8 * to a hardware implementation of the functionality of the software 9 * licensed hereunder. You may use the software subject to the license 10 * terms below provided that you ensure that this notice is replicated --- 384 unchanged lines hidden (view full) --- 395 cpacrMask.cp10 = ones; 396 cpacrMask.cp11 = ones; 397 cpacrMask.asedis = ones; 398 399 // Security Extensions may limit the readability of CPACR 400 if (haveSecurity) { 401 scr = readMiscRegNoEffect(MISCREG_SCR); 402 cpsr = readMiscRegNoEffect(MISCREG_CPSR); | 3 * All rights reserved 4 * 5 * The license below extends only to copyright in the software and shall 6 * not be construed as granting a license to any other intellectual 7 * property including but not limited to intellectual property relating 8 * to a hardware implementation of the functionality of the software 9 * licensed hereunder. You may use the software subject to the license 10 * terms below provided that you ensure that this notice is replicated --- 384 unchanged lines hidden (view full) --- 395 cpacrMask.cp10 = ones; 396 cpacrMask.cp11 = ones; 397 cpacrMask.asedis = ones; 398 399 // Security Extensions may limit the readability of CPACR 400 if (haveSecurity) { 401 scr = readMiscRegNoEffect(MISCREG_SCR); 402 cpsr = readMiscRegNoEffect(MISCREG_CPSR); |
403 if (scr.ns && (cpsr.mode != MODE_MON)) { | 403 if (scr.ns && (cpsr.mode != MODE_MON) && ELIs32(tc, EL3)) { |
404 NSACR nsacr = readMiscRegNoEffect(MISCREG_NSACR); 405 // NB: Skipping the full loop, here 406 if (!nsacr.cp10) cpacrMask.cp10 = 0; 407 if (!nsacr.cp11) cpacrMask.cp11 = 0; 408 } 409 } 410 MiscReg val = readMiscRegNoEffect(MISCREG_CPACR); 411 val &= cpacrMask; --- 328 unchanged lines hidden (view full) --- 740 cpacrMask.cp10 = ones; 741 cpacrMask.cp11 = ones; 742 cpacrMask.asedis = ones; 743 744 // Security Extensions may limit the writability of CPACR 745 if (haveSecurity) { 746 scr = readMiscRegNoEffect(MISCREG_SCR); 747 CPSR cpsr = readMiscRegNoEffect(MISCREG_CPSR); | 404 NSACR nsacr = readMiscRegNoEffect(MISCREG_NSACR); 405 // NB: Skipping the full loop, here 406 if (!nsacr.cp10) cpacrMask.cp10 = 0; 407 if (!nsacr.cp11) cpacrMask.cp11 = 0; 408 } 409 } 410 MiscReg val = readMiscRegNoEffect(MISCREG_CPACR); 411 val &= cpacrMask; --- 328 unchanged lines hidden (view full) --- 740 cpacrMask.cp10 = ones; 741 cpacrMask.cp11 = ones; 742 cpacrMask.asedis = ones; 743 744 // Security Extensions may limit the writability of CPACR 745 if (haveSecurity) { 746 scr = readMiscRegNoEffect(MISCREG_SCR); 747 CPSR cpsr = readMiscRegNoEffect(MISCREG_CPSR); |
748 if (scr.ns && (cpsr.mode != MODE_MON)) { | 748 if (scr.ns && (cpsr.mode != MODE_MON) && ELIs32(tc, EL3)) { |
749 NSACR nsacr = readMiscRegNoEffect(MISCREG_NSACR); 750 // NB: Skipping the full loop, here 751 if (!nsacr.cp10) cpacrMask.cp10 = 0; 752 if (!nsacr.cp11) cpacrMask.cp11 = 0; 753 } 754 } 755 756 MiscReg old_val = readMiscRegNoEffect(MISCREG_CPACR); --- 1213 unchanged lines hidden --- | 749 NSACR nsacr = readMiscRegNoEffect(MISCREG_NSACR); 750 // NB: Skipping the full loop, here 751 if (!nsacr.cp10) cpacrMask.cp10 = 0; 752 if (!nsacr.cp11) cpacrMask.cp11 = 0; 753 } 754 } 755 756 MiscReg old_val = readMiscRegNoEffect(MISCREG_CPACR); --- 1213 unchanged lines hidden --- |