isa.cc (12639:c133e5b397a4) isa.cc (12666:bea22b5e6cf7)
1/*
1/*
2 * Copyright (c) 2010-2016 ARM Limited
2 * Copyright (c) 2010-2017 ARM Limited
3 * All rights reserved
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software
9 * licensed hereunder. You may use the software subject to the license
10 * terms below provided that you ensure that this notice is replicated

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1690 if (haveLPAE)
1691 ttbcrMask.eae = ones;
1692
1693 if (haveLPAE && ttbcrNew.eae) {
1694 newVal = newVal & ttbcrMask;
1695 } else {
1696 newVal = (newVal & ttbcrMask) | (ttbcr & (~ttbcrMask));
1697 }
3 * All rights reserved
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software
9 * licensed hereunder. You may use the software subject to the license
10 * terms below provided that you ensure that this notice is replicated

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1690 if (haveLPAE)
1691 ttbcrMask.eae = ones;
1692
1693 if (haveLPAE && ttbcrNew.eae) {
1694 newVal = newVal & ttbcrMask;
1695 } else {
1696 newVal = (newVal & ttbcrMask) | (ttbcr & (~ttbcrMask));
1697 }
1698 // Invalidate TLB MiscReg
1699 getITBPtr(tc)->invalidateMiscReg();
1700 getDTBPtr(tc)->invalidateMiscReg();
1701 break;
1698 }
1702 }
1699 M5_FALLTHROUGH;
1700 case MISCREG_TTBR0:
1701 case MISCREG_TTBR1:
1702 {
1703 TTBCR ttbcr = readMiscRegNoEffect(MISCREG_TTBCR);
1704 if (haveLPAE) {
1705 if (ttbcr.eae) {
1706 // ARMv7 bit 63-56, 47-40 reserved, UNK/SBZP
1707 // ARMv8 AArch32 bit 63-56 only
1708 uint64_t ttbrMask = mask(63,56) | mask(47,40);
1709 newVal = (newVal & (~ttbrMask));
1710 }
1711 }
1703 case MISCREG_TTBR0:
1704 case MISCREG_TTBR1:
1705 {
1706 TTBCR ttbcr = readMiscRegNoEffect(MISCREG_TTBCR);
1707 if (haveLPAE) {
1708 if (ttbcr.eae) {
1709 // ARMv7 bit 63-56, 47-40 reserved, UNK/SBZP
1710 // ARMv8 AArch32 bit 63-56 only
1711 uint64_t ttbrMask = mask(63,56) | mask(47,40);
1712 newVal = (newVal & (~ttbrMask));
1713 }
1714 }
1712 }
1713 M5_FALLTHROUGH;
1714 case MISCREG_SCTLR_EL1:
1715 {
1715 // Invalidate TLB MiscReg
1716 getITBPtr(tc)->invalidateMiscReg();
1717 getDTBPtr(tc)->invalidateMiscReg();
1716 getITBPtr(tc)->invalidateMiscReg();
1717 getDTBPtr(tc)->invalidateMiscReg();
1718 setMiscRegNoEffect(misc_reg, newVal);
1718 break;
1719 }
1719 }
1720 M5_FALLTHROUGH;
1720 case MISCREG_SCTLR_EL1:
1721 case MISCREG_CONTEXTIDR:
1722 case MISCREG_PRRR:
1723 case MISCREG_NMRR:
1724 case MISCREG_MAIR0:
1725 case MISCREG_MAIR1:
1726 case MISCREG_DACR:
1727 case MISCREG_VTTBR:
1728 case MISCREG_SCR_EL3:

--- 241 unchanged lines hidden --- 		1721 case MISCREG_CONTEXTIDR:
1722 case MISCREG_PRRR:
1723 case MISCREG_NMRR:
1724 case MISCREG_MAIR0:
1725 case MISCREG_MAIR1:
1726 case MISCREG_DACR:
1727 case MISCREG_VTTBR:
1728 case MISCREG_SCR_EL3:

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