isa.cc (12479:c686e4a1fe8f) isa.cc (12510:b8203d3676fc)
1/*
2 * Copyright (c) 2010-2016 ARM Limited
3 * All rights reserved
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software

--- 712 unchanged lines hidden (view full) ---

721
722 if (misc_reg == MISCREG_CPSR) {
723 updateRegMap(val);
724
725
726 CPSR old_cpsr = miscRegs[MISCREG_CPSR];
727 int old_mode = old_cpsr.mode;
728 CPSR cpsr = val;
1/*
2 * Copyright (c) 2010-2016 ARM Limited
3 * All rights reserved
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software

--- 712 unchanged lines hidden (view full) ---

721
722 if (misc_reg == MISCREG_CPSR) {
723 updateRegMap(val);
724
725
726 CPSR old_cpsr = miscRegs[MISCREG_CPSR];
727 int old_mode = old_cpsr.mode;
728 CPSR cpsr = val;
729 if (old_mode != cpsr.mode) {
729 if (old_mode != cpsr.mode || cpsr.il != old_cpsr.il) {
730 getITBPtr(tc)->invalidateMiscReg();
731 getDTBPtr(tc)->invalidateMiscReg();
732 }
733
734 DPRINTF(Arm, "Updating CPSR from %#x to %#x f:%d i:%d a:%d mode:%#x\n",
735 miscRegs[misc_reg], cpsr, cpsr.f, cpsr.i, cpsr.a, cpsr.mode);
736 PCState pc = tc->pcState();
737 pc.nextThumb(cpsr.t);

--- 1151 unchanged lines hidden --- 		730 getITBPtr(tc)->invalidateMiscReg();
731 getDTBPtr(tc)->invalidateMiscReg();
732 }
733
734 DPRINTF(Arm, "Updating CPSR from %#x to %#x f:%d i:%d a:%d mode:%#x\n",
735 miscRegs[misc_reg], cpsr, cpsr.f, cpsr.i, cpsr.a, cpsr.mode);
736 PCState pc = tc->pcState();
737 pc.nextThumb(cpsr.t);

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