isa.cc (12109:f29e9c5418aa) isa.cc (12392:e0dbdf30a2a5)
1/*
2 * Copyright (c) 2010-2016 ARM Limited
3 * All rights reserved
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software

--- 1639 unchanged lines hidden (view full) ---

1648 ttbcrMask.eae = ones;
1649
1650 if (haveLPAE && ttbcrNew.eae) {
1651 newVal = newVal & ttbcrMask;
1652 } else {
1653 newVal = (newVal & ttbcrMask) | (ttbcr & (~ttbcrMask));
1654 }
1655 }
1/*
2 * Copyright (c) 2010-2016 ARM Limited
3 * All rights reserved
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software

--- 1639 unchanged lines hidden (view full) ---

1648 ttbcrMask.eae = ones;
1649
1650 if (haveLPAE && ttbcrNew.eae) {
1651 newVal = newVal & ttbcrMask;
1652 } else {
1653 newVal = (newVal & ttbcrMask) | (ttbcr & (~ttbcrMask));
1654 }
1655 }
1656 M5_FALLTHROUGH;
1656 case MISCREG_TTBR0:
1657 case MISCREG_TTBR1:
1658 {
1659 TTBCR ttbcr = readMiscRegNoEffect(MISCREG_TTBCR);
1660 if (haveLPAE) {
1661 if (ttbcr.eae) {
1662 // ARMv7 bit 63-56, 47-40 reserved, UNK/SBZP
1663 // ARMv8 AArch32 bit 63-56 only
1664 uint64_t ttbrMask = mask(63,56) | mask(47,40);
1665 newVal = (newVal & (~ttbrMask));
1666 }
1667 }
1668 }
1657 case MISCREG_TTBR0:
1658 case MISCREG_TTBR1:
1659 {
1660 TTBCR ttbcr = readMiscRegNoEffect(MISCREG_TTBCR);
1661 if (haveLPAE) {
1662 if (ttbcr.eae) {
1663 // ARMv7 bit 63-56, 47-40 reserved, UNK/SBZP
1664 // ARMv8 AArch32 bit 63-56 only
1665 uint64_t ttbrMask = mask(63,56) | mask(47,40);
1666 newVal = (newVal & (~ttbrMask));
1667 }
1668 }
1669 }
1670 M5_FALLTHROUGH;
1669 case MISCREG_SCTLR_EL1:
1670 {
1671 tc->getITBPtr()->invalidateMiscReg();
1672 tc->getDTBPtr()->invalidateMiscReg();
1673 setMiscRegNoEffect(misc_reg, newVal);
1674 }
1671 case MISCREG_SCTLR_EL1:
1672 {
1673 tc->getITBPtr()->invalidateMiscReg();
1674 tc->getDTBPtr()->invalidateMiscReg();
1675 setMiscRegNoEffect(misc_reg, newVal);
1676 }
1677 M5_FALLTHROUGH;
1675 case MISCREG_CONTEXTIDR:
1676 case MISCREG_PRRR:
1677 case MISCREG_NMRR:
1678 case MISCREG_MAIR0:
1679 case MISCREG_MAIR1:
1680 case MISCREG_DACR:
1681 case MISCREG_VTTBR:
1682 case MISCREG_SCR_EL3:

--- 328 unchanged lines hidden --- 		1678 case MISCREG_CONTEXTIDR:
1679 case MISCREG_PRRR:
1680 case MISCREG_NMRR:
1681 case MISCREG_MAIR0:
1682 case MISCREG_MAIR1:
1683 case MISCREG_DACR:
1684 case MISCREG_VTTBR:
1685 case MISCREG_SCR_EL3:

--- 328 unchanged lines hidden ---