isa.cc (11577:a26a328c20eb) isa.cc (11584:bbd8448f104e)
1/*
2 * Copyright (c) 2010-2016 ARM Limited
3 * All rights reserved
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software

--- 1379 unchanged lines hidden (view full) ---

1388 }
1389 return;
1390 // AArch64 TLBI: invalidate by IPA, stage 2, current VMID
1391 case MISCREG_TLBI_IPAS2LE1IS_Xt:
1392 case MISCREG_TLBI_IPAS2LE1_Xt:
1393 case MISCREG_TLBI_IPAS2E1IS_Xt:
1394 case MISCREG_TLBI_IPAS2E1_Xt:
1395 assert64(tc);
1/*
2 * Copyright (c) 2010-2016 ARM Limited
3 * All rights reserved
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software

--- 1379 unchanged lines hidden (view full) ---

1388 }
1389 return;
1390 // AArch64 TLBI: invalidate by IPA, stage 2, current VMID
1391 case MISCREG_TLBI_IPAS2LE1IS_Xt:
1392 case MISCREG_TLBI_IPAS2LE1_Xt:
1393 case MISCREG_TLBI_IPAS2E1IS_Xt:
1394 case MISCREG_TLBI_IPAS2E1_Xt:
1395 assert64(tc);
1396 // @todo: implement these as part of Virtualization
1397 warn("Not doing anything for write of miscreg ITLB_IPAS2\n");
1396 target_el = 1; // EL 0 and 1 are handled together
1397 scr = readMiscReg(MISCREG_SCR, tc);
1398 secure_lookup = haveSecurity && !scr.ns;
1399 sys = tc->getSystemPtr();
1400 for (x = 0; x < sys->numContexts(); x++) {
1401 oc = sys->getThreadContext(x);
1402 assert(oc->getITBPtr() && oc->getDTBPtr());
1403 Addr ipa = ((Addr) bits(newVal, 35, 0)) << 12;
1404 oc->getITBPtr()->flushIpaVmid(ipa,
1405 secure_lookup, false, target_el);
1406 oc->getDTBPtr()->flushIpaVmid(ipa,
1407 secure_lookup, false, target_el);
1408
1409 CheckerCPU *checker = oc->getCheckerCpuPtr();
1410 if (checker) {
1411 checker->getITBPtr()->flushIpaVmid(ipa,
1412 secure_lookup, false, target_el);
1413 checker->getDTBPtr()->flushIpaVmid(ipa,
1414 secure_lookup, false, target_el);
1415 }
1416 }
1398 return;
1399 case MISCREG_ACTLR:
1400 warn("Not doing anything for write of miscreg ACTLR\n");
1401 break;
1402
1403 case MISCREG_PMXEVTYPER_PMCCFILTR:
1404 case MISCREG_PMINTENSET_EL1 ... MISCREG_PMOVSSET_EL0:
1405 case MISCREG_PMEVCNTR0_EL0 ... MISCREG_PMEVTYPER5_EL0:

--- 546 unchanged lines hidden --- 		1417 return;
1418 case MISCREG_ACTLR:
1419 warn("Not doing anything for write of miscreg ACTLR\n");
1420 break;
1421
1422 case MISCREG_PMXEVTYPER_PMCCFILTR:
1423 case MISCREG_PMINTENSET_EL1 ... MISCREG_PMOVSSET_EL0:
1424 case MISCREG_PMEVCNTR0_EL0 ... MISCREG_PMEVTYPER5_EL0:

--- 546 unchanged lines hidden ---