1/* 2 * Copyright (c) 2010-2011 ARM Limited 3 * All rights reserved 4 * 5 * The license below extends only to copyright in the software and shall 6 * not be construed as granting a license to any other intellectual 7 * property including but not limited to intellectual property relating 8 * to a hardware implementation of the functionality of the software --- 545 unchanged lines hidden (view full) --- 554 case MISCREG_V2PCWUW: 555 flags = TLB::MustBeOne | TLB::UserMode; 556 mode = BaseTLB::Write; 557 break; 558 default: 559 panic("Security Extensions not implemented!"); 560 } 561 warn("Translating via MISCREG in atomic mode! Fix Me!\n"); |
562 req->setVirt(0, val, 1, flags, tc->pcState().pc(), 563 Request::funcMasterId); |
564 fault = tc->getDTBPtr()->translateAtomic(req, tc, mode); 565 if (fault == NoFault) { 566 miscRegs[MISCREG_PAR] = 567 (req->getPaddr() & 0xfffff000) | 568 (tc->getDTBPtr()->getAttr() ); 569 DPRINTF(MiscRegs, 570 "MISCREG: Translated addr 0x%08x: PAR: 0x%08x\n", 571 val, miscRegs[MISCREG_PAR]); --- 35 unchanged lines hidden --- |