1/* 2 * Copyright (c) 2010-2018 ARM Limited 3 * All rights reserved 4 * 5 * The license below extends only to copyright in the software and shall 6 * not be construed as granting a license to any other intellectual 7 * property including but not limited to intellectual property relating 8 * to a hardware implementation of the functionality of the software --- 68 unchanged lines hidden (view full) --- 77 78 system = dynamic_cast<ArmSystem *>(p->system); 79 80 // Cache system-level properties 81 if (FullSystem && system) { 82 highestELIs64 = system->highestELIs64(); 83 haveSecurity = system->haveSecurity(); 84 haveLPAE = system->haveLPAE(); |
85 haveCrypto = system->haveCrypto(); |
86 haveVirtualization = system->haveVirtualization(); 87 haveLargeAsid64 = system->haveLargeAsid64(); 88 physAddrRange = system->physAddrRange(); 89 } else { 90 highestELIs64 = true; // ArmSystem::highestELIs64 does the same 91 haveSecurity = haveLPAE = haveVirtualization = false; |
92 haveCrypto = false; |
93 haveLargeAsid64 = false; 94 physAddrRange = 32; // dummy value 95 } 96 97 initializeMiscRegMetadata(); 98 preUnflattenMiscReg(); 99 100 clear(); --- 18 unchanged lines hidden (view full) --- 119 initID32(p); 120 121 // We always initialize AArch64 ID registers even 122 // if we are in AArch32. This is done since if we 123 // are in SE mode we don't know if our ArmProcess is 124 // AArch32 or AArch64 125 initID64(p); 126 |
127 miscRegs[MISCREG_ID_ISAR5] = insertBits( 128 miscRegs[MISCREG_ID_ISAR5], 19, 4, 129 haveCrypto ? 0x1112 : 0x0); 130 |
131 if (FullSystem && system->highestELIs64()) { 132 // Initialize AArch64 state 133 clear64(p); 134 return; 135 } 136 137 // Initialize AArch32 state... 138 --- 206 unchanged lines hidden (view full) --- 345 // Large ASID support 346 miscRegs[MISCREG_ID_AA64MMFR0_EL1] = insertBits( 347 miscRegs[MISCREG_ID_AA64MMFR0_EL1], 7, 4, 348 haveLargeAsid64 ? 0x2 : 0x0); 349 // Physical address size 350 miscRegs[MISCREG_ID_AA64MMFR0_EL1] = insertBits( 351 miscRegs[MISCREG_ID_AA64MMFR0_EL1], 3, 0, 352 encodePhysAddrRange64(physAddrRange)); |
353 // Crypto 354 miscRegs[MISCREG_ID_AA64ISAR0_EL1] = insertBits( 355 miscRegs[MISCREG_ID_AA64ISAR0_EL1], 19, 4, 356 haveCrypto ? 0x1112 : 0x0); |
357} 358 359void 360ISA::startup(ThreadContext *tc) 361{ 362 pmu->setThreadContext(tc); 363 364} --- 1632 unchanged lines hidden --- |