87c87
< physAddrRange64 = system->physAddrRange64();
---
> physAddrRange = system->physAddrRange();
92c92
< physAddrRange64 = 32; // dummy value
---
> physAddrRange = 32; // dummy value
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< // Initialize configurable default values
< miscRegs[MISCREG_MIDR] = p->midr;
< miscRegs[MISCREG_MIDR_EL1] = p->midr;
< miscRegs[MISCREG_VPIDR] = p->midr;
---
> initID32(p);
122,127c119,123
< miscRegs[MISCREG_ID_ISAR0] = p->id_isar0;
< miscRegs[MISCREG_ID_ISAR1] = p->id_isar1;
< miscRegs[MISCREG_ID_ISAR2] = p->id_isar2;
< miscRegs[MISCREG_ID_ISAR3] = p->id_isar3;
< miscRegs[MISCREG_ID_ISAR4] = p->id_isar4;
< miscRegs[MISCREG_ID_ISAR5] = p->id_isar5;
---
> // We always initialize AArch64 ID registers even
> // if we are in AArch32. This is done since if we
> // are in SE mode we don't know if our ArmProcess is
> // AArch32 or AArch64
> initID64(p);
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< miscRegs[MISCREG_ID_MMFR0] = p->id_mmfr0;
< miscRegs[MISCREG_ID_MMFR1] = p->id_mmfr1;
< miscRegs[MISCREG_ID_MMFR2] = p->id_mmfr2;
< miscRegs[MISCREG_ID_MMFR3] = p->id_mmfr3;
<
292a284
> }
293a286,309
> void
> ISA::initID32(const ArmISAParams *p)
> {
> // Initialize configurable default values
> miscRegs[MISCREG_MIDR] = p->midr;
> miscRegs[MISCREG_MIDR_EL1] = p->midr;
> miscRegs[MISCREG_VPIDR] = p->midr;
>
> miscRegs[MISCREG_ID_ISAR0] = p->id_isar0;
> miscRegs[MISCREG_ID_ISAR1] = p->id_isar1;
> miscRegs[MISCREG_ID_ISAR2] = p->id_isar2;
> miscRegs[MISCREG_ID_ISAR3] = p->id_isar3;
> miscRegs[MISCREG_ID_ISAR4] = p->id_isar4;
> miscRegs[MISCREG_ID_ISAR5] = p->id_isar5;
>
> miscRegs[MISCREG_ID_MMFR0] = p->id_mmfr0;
> miscRegs[MISCREG_ID_MMFR1] = p->id_mmfr1;
> miscRegs[MISCREG_ID_MMFR2] = p->id_mmfr2;
> miscRegs[MISCREG_ID_MMFR3] = p->id_mmfr3;
> }
>
> void
> ISA::initID64(const ArmISAParams *p)
> {
329c345
< encodePhysAddrRange64(physAddrRange64));
---
> encodePhysAddrRange64(physAddrRange));