2c2
< * Copyright (c) 2010-2018 ARM Limited
---
> * Copyright (c) 2010-2019 ARM Limited
93a94
> havePAN = system->havePAN();
101a103
> havePAN = false;
393a396,399
> // PAN
> miscRegs[MISCREG_ID_AA64MMFR1_EL1] = insertBits(
> miscRegs[MISCREG_ID_AA64MMFR1_EL1], 23, 20,
> havePAN ? 0x1 : 0x0);
642a649,652
> case MISCREG_PAN:
> {
> return miscRegs[MISCREG_CPSR] & 0x400000;
> }
1882a1893,1903
> case MISCREG_PAN:
> {
> // PAN is affecting data accesses
> getDTBPtr(tc)->invalidateMiscReg();
>
> CPSR cpsr = miscRegs[MISCREG_CPSR];
> cpsr.pan = (uint8_t) ((CPSR) newVal).pan;
> newVal = cpsr;
> misc_reg = MISCREG_CPSR;
> }
> break;
2023,2025c2044,2050
< // Force bits 23:21 to 0
< newVal = val & ~(0x7 << 21);
< break;
---
> {
> RegVal spsr_mask = havePAN ?
> ~(0x5 << 21) : ~(0x7 << 21);
>
> newVal = val & spsr_mask;
> break;
> }