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> #include "arch/arm/pmu.hh"
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> #include "cpu/base.hh"
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< : SimObject(p), system(NULL), lookUpMiscReg(NUM_MISCREGS, {0,0})
---
> : SimObject(p),
> system(NULL),
> pmu(p->pmu),
> lookUpMiscReg(NUM_MISCREGS, {0,0})
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> // Hook up a dummy device if we haven't been configured with a
> // real PMU. By using a dummy device, we don't need to check that
> // the PMU exist every time we try to access a PMU register.
> if (!pmu)
> pmu = &dummyDevice;
>
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< miscRegs[MISCREG_ID_AA64DFR0_EL1] = p->id_aa64dfr0_el1;
---
> miscRegs[MISCREG_ID_AA64DFR0_EL1] =
> (p->id_aa64dfr0_el1 & 0xfffffffffffff0ffULL) |
> (p->pmu ? 0x0000000000000100ULL : 0); // Enable PMUv3
>
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> miscRegs[MISCREG_ID_DFR0_EL1] =
> (p->pmu ? 0x03000000ULL : 0); // Enable PMUv3
>
> miscRegs[MISCREG_ID_DFR0] = miscRegs[MISCREG_ID_DFR0_EL1];
>
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< case MISCREG_ID_DFR0: // not implemented, so alias MIDR
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< case MISCREG_PMCR:
< case MISCREG_PMCCNTR:
< case MISCREG_PMSELR:
< warn("Not doing anything for read to miscreg %s\n",
< miscRegName[misc_reg]);
< break;
---
>
> case MISCREG_PMXEVTYPER_PMCCFILTR:
> case MISCREG_PMINTENSET_EL1 ... MISCREG_PMOVSSET_EL0:
> case MISCREG_PMEVCNTR0_EL0 ... MISCREG_PMEVTYPER5_EL0:
> case MISCREG_PMCR ... MISCREG_PMOVSSET:
> return pmu->readMiscReg(misc_reg);
>
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< * Return 0 as we don't support debug architecture yet.
---
> * ARMv7, v7.1 Debug architecture (0b0101 --> 0x5)
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< return 0;
---
> return 0x5 << 16;
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> case MISCREG_ID_DFR0:
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< case MISCREG_PMCR:
< {
< // Performance counters not implemented. Instead, interpret
< // a reset command to this register to reset the simulator
< // statistics.
< // PMCR_E | PMCR_P | PMCR_C
< const int ResetAndEnableCounters = 0x7;
< if (newVal == ResetAndEnableCounters) {
< inform("Resetting all simobject stats\n");
< Stats::schedStatEvent(false, true);
< break;
< }
< }
< case MISCREG_PMCCNTR:
< case MISCREG_PMSELR:
< warn("Not doing anything for write to miscreg %s\n",
< miscRegName[misc_reg]);
---
>
> case MISCREG_PMXEVTYPER_PMCCFILTR:
> case MISCREG_PMINTENSET_EL1 ... MISCREG_PMOVSSET_EL0:
> case MISCREG_PMEVCNTR0_EL0 ... MISCREG_PMEVTYPER5_EL0:
> case MISCREG_PMCR ... MISCREG_PMOVSSET:
> pmu->setMiscReg(misc_reg, newVal);
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>
>