isa.cc (11435:0f1b46dde3fa) | isa.cc (11560:f050b8cf4754) |
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1/* 2 * Copyright (c) 2010-2015 ARM Limited 3 * All rights reserved 4 * 5 * The license below extends only to copyright in the software and shall 6 * not be construed as granting a license to any other intellectual 7 * property including but not limited to intellectual property relating 8 * to a hardware implementation of the functionality of the software --- 1506 unchanged lines hidden (view full) --- 1515 } 1516 // If we're in timing mode then doing the translation in 1517 // functional mode then we're slightly distorting performance 1518 // results obtained from simulations. The translation should be 1519 // done in the same mode the core is running in. NOTE: This 1520 // can't be an atomic translation because that causes problems 1521 // with unexpected atomic snoop requests. 1522 warn("Translating via MISCREG(%d) in functional mode! Fix Me!\n", misc_reg); | 1/* 2 * Copyright (c) 2010-2015 ARM Limited 3 * All rights reserved 4 * 5 * The license below extends only to copyright in the software and shall 6 * not be construed as granting a license to any other intellectual 7 * property including but not limited to intellectual property relating 8 * to a hardware implementation of the functionality of the software --- 1506 unchanged lines hidden (view full) --- 1515 } 1516 // If we're in timing mode then doing the translation in 1517 // functional mode then we're slightly distorting performance 1518 // results obtained from simulations. The translation should be 1519 // done in the same mode the core is running in. NOTE: This 1520 // can't be an atomic translation because that causes problems 1521 // with unexpected atomic snoop requests. 1522 warn("Translating via MISCREG(%d) in functional mode! Fix Me!\n", misc_reg); |
1523 Request req(0, val, 1, flags, Request::funcMasterId, | 1523 Request req(0, val, 0, flags, Request::funcMasterId, |
1524 tc->pcState().pc(), tc->contextId()); 1525 fault = tc->getDTBPtr()->translateFunctional(&req, tc, mode, tranType); 1526 TTBCR ttbcr = readMiscRegNoEffect(MISCREG_TTBCR); 1527 HCR hcr = readMiscRegNoEffect(MISCREG_HCR); 1528 1529 MiscReg newVal; 1530 if (fault == NoFault) { 1531 Addr paddr = req.getPaddr(); --- 228 unchanged lines hidden (view full) --- 1760 } 1761 // If we're in timing mode then doing the translation in 1762 // functional mode then we're slightly distorting performance 1763 // results obtained from simulations. The translation should be 1764 // done in the same mode the core is running in. NOTE: This 1765 // can't be an atomic translation because that causes problems 1766 // with unexpected atomic snoop requests. 1767 warn("Translating via MISCREG(%d) in functional mode! Fix Me!\n", misc_reg); | 1524 tc->pcState().pc(), tc->contextId()); 1525 fault = tc->getDTBPtr()->translateFunctional(&req, tc, mode, tranType); 1526 TTBCR ttbcr = readMiscRegNoEffect(MISCREG_TTBCR); 1527 HCR hcr = readMiscRegNoEffect(MISCREG_HCR); 1528 1529 MiscReg newVal; 1530 if (fault == NoFault) { 1531 Addr paddr = req.getPaddr(); --- 228 unchanged lines hidden (view full) --- 1760 } 1761 // If we're in timing mode then doing the translation in 1762 // functional mode then we're slightly distorting performance 1763 // results obtained from simulations. The translation should be 1764 // done in the same mode the core is running in. NOTE: This 1765 // can't be an atomic translation because that causes problems 1766 // with unexpected atomic snoop requests. 1767 warn("Translating via MISCREG(%d) in functional mode! Fix Me!\n", misc_reg); |
1768 req->setVirt(0, val, 1, flags, Request::funcMasterId, | 1768 req->setVirt(0, val, 0, flags, Request::funcMasterId, |
1769 tc->pcState().pc()); 1770 req->setContext(tc->contextId()); 1771 fault = tc->getDTBPtr()->translateFunctional(req, tc, mode, 1772 tranType); 1773 1774 MiscReg newVal; 1775 if (fault == NoFault) { 1776 Addr paddr = req->getPaddr(); --- 166 unchanged lines hidden --- | 1769 tc->pcState().pc()); 1770 req->setContext(tc->contextId()); 1771 fault = tc->getDTBPtr()->translateFunctional(req, tc, mode, 1772 tranType); 1773 1774 MiscReg newVal; 1775 if (fault == NoFault) { 1776 Addr paddr = req->getPaddr(); --- 166 unchanged lines hidden --- |