interrupts.hh (8518:9c87727099ce) interrupts.hh (9656:06ec4e8fc7cd)
1/*
1/*
2 * Copyright (c) 2010 ARM Limited
2 * Copyright (c) 2010,2012 ARM Limited
3 * All rights reserved
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software
9 * licensed hereunder. You may use the software subject to the license
10 * terms below provided that you ensure that this notice is replicated

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145 * @return any interrupts pending
146 */
147 bool
148 checkRaw() const
149 {
150 return intStatus;
151 }
152
3 * All rights reserved
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software
9 * licensed hereunder. You may use the software subject to the license
10 * terms below provided that you ensure that this notice is replicated

--- 134 unchanged lines hidden (view full) ---

145 * @return any interrupts pending
146 */
147 bool
148 checkRaw() const
149 {
150 return intStatus;
151 }
152
153 /**
154 * Check the state of a particular interrupt, ignoring CPSR masks.
155 *
156 * This method is primarily used when running the target CPU in a
157 * hardware VM (e.g., KVM) to check if interrupts should be
158 * delivered upon guest entry.
159 *
160 * @param interrupt Interrupt type to check the state of.
161 * @return true if the interrupt is asserted, false otherwise.
162 */
163 bool
164 checkRaw(InterruptTypes interrupt) const
165 {
166 if (interrupt >= NumInterruptTypes)
167 panic("Interrupt number out of range.\n");
153
168
169 return interrupts[interrupt];
170 }
171
154 Fault
155 getInterrupt(ThreadContext *tc)
156 {
157 if (!intStatus)
158 return NoFault;
159
160 CPSR cpsr = tc->readMiscReg(MISCREG_CPSR);
161

--- 38 unchanged lines hidden --- 		172 Fault
173 getInterrupt(ThreadContext *tc)
174 {
175 if (!intStatus)
176 return NoFault;
177
178 CPSR cpsr = tc->readMiscReg(MISCREG_CPSR);
179

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