interrupts.hh (7847:0c6613ad8f18) | interrupts.hh (8245:a9d06c894afe) |
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1/* 2 * Copyright (c) 2010 ARM Limited 3 * All rights reserved 4 * 5 * The license below extends only to copyright in the software and shall 6 * not be construed as granting a license to any other intellectual 7 * property including but not limited to intellectual property relating 8 * to a hardware implementation of the functionality of the software --- 34 unchanged lines hidden (view full) --- 43#ifndef __ARCH_ARM_INTERRUPT_HH__ 44#define __ARCH_ARM_INTERRUPT_HH__ 45 46#include "arch/arm/faults.hh" 47#include "arch/arm/isa_traits.hh" 48#include "arch/arm/miscregs.hh" 49#include "arch/arm/registers.hh" 50#include "cpu/thread_context.hh" | 1/* 2 * Copyright (c) 2010 ARM Limited 3 * All rights reserved 4 * 5 * The license below extends only to copyright in the software and shall 6 * not be construed as granting a license to any other intellectual 7 * property including but not limited to intellectual property relating 8 * to a hardware implementation of the functionality of the software --- 34 unchanged lines hidden (view full) --- 43#ifndef __ARCH_ARM_INTERRUPT_HH__ 44#define __ARCH_ARM_INTERRUPT_HH__ 45 46#include "arch/arm/faults.hh" 47#include "arch/arm/isa_traits.hh" 48#include "arch/arm/miscregs.hh" 49#include "arch/arm/registers.hh" 50#include "cpu/thread_context.hh" |
51#include "debug/Interrupt.hh" |
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51#include "params/ArmInterrupts.hh" 52#include "sim/sim_object.hh" 53 54namespace ArmISA 55{ 56 57class Interrupts : public SimObject 58{ --- 124 unchanged lines hidden --- | 52#include "params/ArmInterrupts.hh" 53#include "sim/sim_object.hh" 54 55namespace ArmISA 56{ 57 58class Interrupts : public SimObject 59{ --- 124 unchanged lines hidden --- |