vfp.hh (7430:db3e376f35d1) vfp.hh (7639:8c09b7ff5b57)
1/*
2 * Copyright (c) 2010 ARM Limited
3 * All rights reserved
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software

--- 178 unchanged lines hidden (view full) ---

187 {
188 double fp;
189 uint64_t bits;
190 } val;
191 val.bits = bits;
192 return val.fp;
193}
194
1/*
2 * Copyright (c) 2010 ARM Limited
3 * All rights reserved
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software

--- 178 unchanged lines hidden (view full) ---

187 {
188 double fp;
189 uint64_t bits;
190 } val;
191 val.bits = bits;
192 return val.fp;
193}
194
195template <class fpType>
196static bool
197isSnan(fpType val)
198{
199 const bool single = (sizeof(fpType) == sizeof(float));
200 const uint64_t qnan =
201 single ? 0x7fc00000 : ULL(0x7ff8000000000000);
202 return std::isnan(val) && ((fpToBits(val) & qnan) != qnan);
203}
204
195typedef int VfpSavedState;
196
197VfpSavedState prepFpState(uint32_t rMode);
205typedef int VfpSavedState;
206
207VfpSavedState prepFpState(uint32_t rMode);
198void finishVfp(FPSCR &fpscr, VfpSavedState state);
208void finishVfp(FPSCR &fpscr, VfpSavedState state, bool flush);
199
200template <class fpType>
201fpType fixDest(FPSCR fpscr, fpType val, fpType op1);
202
203template <class fpType>
204fpType fixDest(FPSCR fpscr, fpType val, fpType op1, fpType op2);
205
206template <class fpType>
207fpType fixDivDest(FPSCR fpscr, fpType val, fpType op1, fpType op2);
208
209float fixFpDFpSDest(FPSCR fpscr, double val);
210double fixFpSFpDDest(FPSCR fpscr, float val);
211
209
210template <class fpType>
211fpType fixDest(FPSCR fpscr, fpType val, fpType op1);
212
213template <class fpType>
214fpType fixDest(FPSCR fpscr, fpType val, fpType op1, fpType op2);
215
216template <class fpType>
217fpType fixDivDest(FPSCR fpscr, fpType val, fpType op1, fpType op2);
218
219float fixFpDFpSDest(FPSCR fpscr, double val);
220double fixFpSFpDDest(FPSCR fpscr, float val);
221
212float vcvtFpSFpH(FPSCR &fpscr, float op, float dest, bool top);
213float vcvtFpHFpS(FPSCR &fpscr, float op, bool top);
222uint16_t vcvtFpSFpH(FPSCR &fpscr, bool flush, bool defaultNan,
223 uint32_t rMode, bool ahp, float op);
224float vcvtFpHFpS(FPSCR &fpscr, bool defaultNan, bool ahp, uint16_t op);
214
215static inline double
216makeDouble(uint32_t low, uint32_t high)
217{
218 double junk = 0.0;
219 return bitsToFp((uint64_t)low | ((uint64_t)high << 32), junk);
220}
221

--- 6 unchanged lines hidden (view full) ---

228static inline uint32_t
229highFromDouble(double val)
230{
231 return fpToBits(val) >> 32;
232}
233
234uint64_t vfpFpSToFixed(float val, bool isSigned, bool half,
235 uint8_t imm, bool rzero = true);
225
226static inline double
227makeDouble(uint32_t low, uint32_t high)
228{
229 double junk = 0.0;
230 return bitsToFp((uint64_t)low | ((uint64_t)high << 32), junk);
231}
232

--- 6 unchanged lines hidden (view full) ---

239static inline uint32_t
240highFromDouble(double val)
241{
242 return fpToBits(val) >> 32;
243}
244
245uint64_t vfpFpSToFixed(float val, bool isSigned, bool half,
246 uint8_t imm, bool rzero = true);
236float vfpUFixedToFpS(FPSCR fpscr, uint32_t val, bool half, uint8_t imm);
237float vfpSFixedToFpS(FPSCR fpscr, int32_t val, bool half, uint8_t imm);
247float vfpUFixedToFpS(bool flush, bool defaultNan,
248 uint32_t val, bool half, uint8_t imm);
249float vfpSFixedToFpS(bool flush, bool defaultNan,
250 int32_t val, bool half, uint8_t imm);
238
239uint64_t vfpFpDToFixed(double val, bool isSigned, bool half,
240 uint8_t imm, bool rzero = true);
251
252uint64_t vfpFpDToFixed(double val, bool isSigned, bool half,
253 uint8_t imm, bool rzero = true);
241double vfpUFixedToFpD(FPSCR fpscr, uint32_t val, bool half, uint8_t imm);
242double vfpSFixedToFpD(FPSCR fpscr, int32_t val, bool half, uint8_t imm);
254double vfpUFixedToFpD(bool flush, bool defaultNan,
255 uint32_t val, bool half, uint8_t imm);
256double vfpSFixedToFpD(bool flush, bool defaultNan,
257 int32_t val, bool half, uint8_t imm);
243
258
259float fprSqrtEstimate(FPSCR &fpscr, float op);
260uint32_t unsignedRSqrtEstimate(uint32_t op);
261
262float fpRecipEstimate(FPSCR &fpscr, float op);
263uint32_t unsignedRecipEstimate(uint32_t op);
264
244class VfpMacroOp : public PredMacroOp
245{
246 public:
247 static bool
248 inScalarBank(IntRegIndex idx)
249 {
250 return (idx % 32) < 8;
251 }

--- 55 unchanged lines hidden (view full) ---

307}
308
309static inline double
310fpMulD(double a, double b)
311{
312 return a * b;
313}
314
265class VfpMacroOp : public PredMacroOp
266{
267 public:
268 static bool
269 inScalarBank(IntRegIndex idx)
270 {
271 return (idx % 32) < 8;
272 }

--- 55 unchanged lines hidden (view full) ---

328}
329
330static inline double
331fpMulD(double a, double b)
332{
333 return a * b;
334}
335
336static inline float
337fpMaxS(float a, float b)
338{
339 // Handle comparisons of +0 and -0.
340 if (!std::signbit(a) && std::signbit(b))
341 return a;
342 return fmaxf(a, b);
343}
344
345static inline float
346fpMinS(float a, float b)
347{
348 // Handle comparisons of +0 and -0.
349 if (std::signbit(a) && !std::signbit(b))
350 return a;
351 return fminf(a, b);
352}
353
354static inline float
355fpRSqrtsS(float a, float b)
356{
357 int fpClassA = std::fpclassify(a);
358 int fpClassB = std::fpclassify(b);
359 float aXb;
360 int fpClassAxB;
361
362 if ((fpClassA == FP_ZERO && fpClassB == FP_INFINITE) ||
363 (fpClassA == FP_INFINITE && fpClassB == FP_ZERO)) {
364 return 1.5;
365 }
366 aXb = a*b;
367 fpClassAxB = std::fpclassify(aXb);
368 if(fpClassAxB == FP_SUBNORMAL) {
369 feraiseexcept(FeUnderflow);
370 return 1.5;
371 }
372 return (3.0 - (a * b)) / 2.0;
373}
374
375static inline float
376fpRecpsS(float a, float b)
377{
378 int fpClassA = std::fpclassify(a);
379 int fpClassB = std::fpclassify(b);
380 float aXb;
381 int fpClassAxB;
382
383 if ((fpClassA == FP_ZERO && fpClassB == FP_INFINITE) ||
384 (fpClassA == FP_INFINITE && fpClassB == FP_ZERO)) {
385 return 2.0;
386 }
387 aXb = a*b;
388 fpClassAxB = std::fpclassify(aXb);
389 if(fpClassAxB == FP_SUBNORMAL) {
390 feraiseexcept(FeUnderflow);
391 return 2.0;
392 }
393 return 2.0 - (a * b);
394}
395
315class FpOp : public PredOp
316{
317 protected:
318 FpOp(const char *mnem, ExtMachInst _machInst, OpClass __opClass) :
319 PredOp(mnem, _machInst, __opClass)
320 {}
321
322 virtual float

--- 36 unchanged lines hidden (view full) ---

359 uint32_t
360 dblHi(double val) const
361 {
362 return fpToBits(val) >> 32;
363 }
364
365 template <class fpType>
366 fpType
396class FpOp : public PredOp
397{
398 protected:
399 FpOp(const char *mnem, ExtMachInst _machInst, OpClass __opClass) :
400 PredOp(mnem, _machInst, __opClass)
401 {}
402
403 virtual float

--- 36 unchanged lines hidden (view full) ---

440 uint32_t
441 dblHi(double val) const
442 {
443 return fpToBits(val) >> 32;
444 }
445
446 template <class fpType>
447 fpType
448 processNans(FPSCR &fpscr, bool &done, bool defaultNan,
449 fpType op1, fpType op2) const;
450
451 template <class fpType>
452 fpType
367 binaryOp(FPSCR &fpscr, fpType op1, fpType op2,
368 fpType (*func)(fpType, fpType),
453 binaryOp(FPSCR &fpscr, fpType op1, fpType op2,
454 fpType (*func)(fpType, fpType),
369 bool flush, uint32_t rMode) const;
455 bool flush, bool defaultNan, uint32_t rMode) const;
370
371 template <class fpType>
372 fpType
373 unaryOp(FPSCR &fpscr, fpType op1,
374 fpType (*func)(fpType),
375 bool flush, uint32_t rMode) const;
376};
377

--- 62 unchanged lines hidden (view full) ---

440 FpOp(mnem, _machInst, __opClass), dest(_dest), op1(_op1), op2(_op2)
441 {
442 setVfpMicroFlags(mode, flags);
443 }
444
445 std::string generateDisassembly(Addr pc, const SymbolTable *symtab) const;
446};
447
456
457 template <class fpType>
458 fpType
459 unaryOp(FPSCR &fpscr, fpType op1,
460 fpType (*func)(fpType),
461 bool flush, uint32_t rMode) const;
462};
463

--- 62 unchanged lines hidden (view full) ---

526 FpOp(mnem, _machInst, __opClass), dest(_dest), op1(_op1), op2(_op2)
527 {
528 setVfpMicroFlags(mode, flags);
529 }
530
531 std::string generateDisassembly(Addr pc, const SymbolTable *symtab) const;
532};
533
534class FpRegRegRegImmOp : public FpOp
535{
536 protected:
537 IntRegIndex dest;
538 IntRegIndex op1;
539 IntRegIndex op2;
540 uint64_t imm;
541
542 FpRegRegRegImmOp(const char *mnem, ExtMachInst _machInst,
543 OpClass __opClass, IntRegIndex _dest,
544 IntRegIndex _op1, IntRegIndex _op2,
545 uint64_t _imm, VfpMicroMode mode = VfpNotAMicroop) :
546 FpOp(mnem, _machInst, __opClass),
547 dest(_dest), op1(_op1), op2(_op2), imm(_imm)
548 {
549 setVfpMicroFlags(mode, flags);
550 }
551
552 std::string generateDisassembly(Addr pc, const SymbolTable *symtab) const;
553};
554
448}
449
450#endif //__ARCH_ARM_INSTS_VFP_HH__
555}
556
557#endif //__ARCH_ARM_INSTS_VFP_HH__