vfp.hh (7384:f12b4f28e5eb) vfp.hh (7385:493aea5e1006)
1/*
2 * Copyright (c) 2010 ARM Limited
3 * All rights reserved
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software

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170 uint64_t bits;
171 } val;
172 val.bits = bits;
173 return val.fp;
174}
175
176template <class fpType>
177static inline fpType
1/*
2 * Copyright (c) 2010 ARM Limited
3 * All rights reserved
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software

--- 161 unchanged lines hidden (view full) ---

170 uint64_t bits;
171 } val;
172 val.bits = bits;
173 return val.fp;
174}
175
176template <class fpType>
177static inline fpType
178fixNan(FPSCR fpscr, fpType val, fpType op1, fpType op2)
178fixDest(FPSCR fpscr, fpType val, fpType op1, fpType op2)
179{
179{
180 if (std::isnan(val)) {
180 int fpClass = std::fpclassify(val);
181 fpType junk = 0.0;
182 if (fpClass == FP_NAN) {
181 const bool single = (sizeof(val) == sizeof(float));
182 const uint64_t qnan = single ? 0x7fc00000 : ULL(0x7ff8000000000000);
183 const bool nan1 = std::isnan(op1);
184 const bool nan2 = std::isnan(op2);
185 const bool signal1 = nan1 && ((fpToBits(op1) & qnan) != qnan);
186 const bool signal2 = nan2 && ((fpToBits(op2) & qnan) != qnan);
183 const bool single = (sizeof(val) == sizeof(float));
184 const uint64_t qnan = single ? 0x7fc00000 : ULL(0x7ff8000000000000);
185 const bool nan1 = std::isnan(op1);
186 const bool nan2 = std::isnan(op2);
187 const bool signal1 = nan1 && ((fpToBits(op1) & qnan) != qnan);
188 const bool signal2 = nan2 && ((fpToBits(op2) & qnan) != qnan);
187 fpType junk = 0.0;
188 if ((!nan1 && !nan2) || (fpscr.dn == 1)) {
189 val = bitsToFp(qnan, junk);
190 } else if (signal1) {
191 val = bitsToFp(fpToBits(op1) | qnan, junk);
192 } else if (signal2) {
193 val = bitsToFp(fpToBits(op2) | qnan, junk);
194 } else if (nan1) {
195 val = op1;
196 } else if (nan2) {
197 val = op2;
198 }
189 if ((!nan1 && !nan2) || (fpscr.dn == 1)) {
190 val = bitsToFp(qnan, junk);
191 } else if (signal1) {
192 val = bitsToFp(fpToBits(op1) | qnan, junk);
193 } else if (signal2) {
194 val = bitsToFp(fpToBits(op2) | qnan, junk);
195 } else if (nan1) {
196 val = op1;
197 } else if (nan2) {
198 val = op2;
199 }
200 } else if (fpClass == FP_SUBNORMAL && fpscr.fz == 1) {
201 // Turn val into a zero with the correct sign;
202 uint64_t bitMask = ULL(0x1) << (sizeof(fpType) * 8 - 1);
203 val = bitsToFp(fpToBits(val) & bitMask, junk);
204 feraiseexcept(FeUnderflow);
199 }
200 return val;
201}
202
203static inline uint64_t
204vfpFpSToFixed(float val, bool isSigned, bool half, uint8_t imm)
205{
206 fesetround(FeRoundZero);

--- 358 unchanged lines hidden --- 		205 }
206 return val;
207}
208
209static inline uint64_t
210vfpFpSToFixed(float val, bool isSigned, bool half, uint8_t imm)
211{
212 fesetround(FeRoundZero);

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