vfp.hh (7375:7095d84ffb36) vfp.hh (7376:3b781776b2d9)
1/*
2 * Copyright (c) 2010 ARM Limited
3 * All rights reserved
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software

--- 54 unchanged lines hidden (view full) ---

63 break;
64 case VfpLastMicroop:
65 flags[StaticInst::IsMicroop] =
66 flags[StaticInst::IsLastMicroop] = true;
67 break;
68 case VfpNotAMicroop:
69 break;
70 }
1/*
2 * Copyright (c) 2010 ARM Limited
3 * All rights reserved
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software

--- 54 unchanged lines hidden (view full) ---

63 break;
64 case VfpLastMicroop:
65 flags[StaticInst::IsMicroop] =
66 flags[StaticInst::IsLastMicroop] = true;
67 break;
68 case VfpNotAMicroop:
69 break;
70 }
71 if (mode == VfpMicroop || mode == VfpFirstMicroop) {
72 flags[StaticInst::IsDelayedCommit] = true;
73 }
71}
72
74}
75
76class VfpMacroOp : public PredMacroOp
77{
78 public:
79 static bool
80 inScalarBank(IntRegIndex idx)
81 {
82 return (idx % 32) < 8;
83 }
84
85 protected:
86 bool wide;
87
88 VfpMacroOp(const char *mnem, ExtMachInst _machInst,
89 OpClass __opClass, bool _wide) :
90 PredMacroOp(mnem, _machInst, __opClass), wide(_wide)
91 {}
92
93 IntRegIndex
94 addStride(IntRegIndex idx, unsigned stride)
95 {
96 if (wide) {
97 stride *= 2;
98 }
99 unsigned offset = idx % 8;
100 idx = (IntRegIndex)(idx - offset);
101 offset += stride;
102 idx = (IntRegIndex)(idx + (offset % 8));
103 return idx;
104 }
105
106 void
107 nextIdxs(IntRegIndex &dest, IntRegIndex &op1, IntRegIndex &op2)
108 {
109 unsigned stride = (machInst.fpscrStride == 0) ? 1 : 2;
110 assert(!inScalarBank(dest));
111 dest = addStride(dest, stride);
112 op1 = addStride(op1, stride);
113 if (!inScalarBank(op2)) {
114 op2 = addStride(op2, stride);
115 }
116 }
117
118 void
119 nextIdxs(IntRegIndex &dest, IntRegIndex &op1)
120 {
121 unsigned stride = (machInst.fpscrStride == 0) ? 1 : 2;
122 assert(!inScalarBank(dest));
123 dest = addStride(dest, stride);
124 if (!inScalarBank(op1)) {
125 op1 = addStride(op1, stride);
126 }
127 }
128
129 void
130 nextIdxs(IntRegIndex &dest)
131 {
132 unsigned stride = (machInst.fpscrStride == 0) ? 1 : 2;
133 assert(!inScalarBank(dest));
134 dest = addStride(dest, stride);
135 }
136};
137
73class VfpRegRegOp : public RegRegOp
74{
75 protected:
76 VfpRegRegOp(const char *mnem, ExtMachInst _machInst, OpClass __opClass,
77 IntRegIndex _dest, IntRegIndex _op1,
78 VfpMicroMode mode = VfpNotAMicroop) :
79 RegRegOp(mnem, _machInst, __opClass, _dest, _op1)
80 {

--- 41 unchanged lines hidden --- 		138class VfpRegRegOp : public RegRegOp
139{
140 protected:
141 VfpRegRegOp(const char *mnem, ExtMachInst _machInst, OpClass __opClass,
142 IntRegIndex _dest, IntRegIndex _op1,
143 VfpMicroMode mode = VfpNotAMicroop) :
144 RegRegOp(mnem, _machInst, __opClass, _dest, _op1)
145 {

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