1/*
2 * Copyright (c) 2010 ARM Limited
3 * All rights reserved
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software

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101{
102 VfpRoundNearest = 0,
103 VfpRoundUpward = 1,
104 VfpRoundDown = 2,
105 VfpRoundZero = 3
106};
107
108template <class fpType>
109static inline void
110vfpFlushToZero(uint32_t &_fpscr, fpType &op)
111{
112 FPSCR fpscr = _fpscr;
113 fpType junk = 0.0;
114 if (fpscr.fz == 1 && (std::fpclassify(op) == FP_SUBNORMAL)) {
115 fpscr.idc = 1;
116 uint64_t bitMask = ULL(0x1) << (sizeof(fpType) * 8 - 1);
117 op = bitsToFp(fpToBits(op) & bitMask, junk);
118 }
119 _fpscr = fpscr;
120}
121
122template <class fpType>
123static inline void
124vfpFlushToZero(uint32_t &fpscr, fpType &op1, fpType &op2)
125{
126 vfpFlushToZero(fpscr, op1);
127 vfpFlushToZero(fpscr, op2);
128}
129
130template <class fpType>
109static inline bool
110flushToZero(fpType &op)
111{
112 fpType junk = 0.0;
113 if (std::fpclassify(op) == FP_SUBNORMAL) {
114 uint64_t bitMask = ULL(0x1) << (sizeof(fpType) * 8 - 1);
115 op = bitsToFp(fpToBits(op) & bitMask, junk);
116 return true;

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122static inline bool
123flushToZero(fpType &op1, fpType &op2)
124{
125 bool flush1 = flushToZero(op1);
126 bool flush2 = flushToZero(op2);
127 return flush1 || flush2;
128}
129
130template <class fpType>
131static inline void
132vfpFlushToZero(FPSCR &fpscr, fpType &op)
133{
134 if (fpscr.fz == 1 && flushToZero(op)) {
135 fpscr.idc = 1;
136 }
137}
138
139template <class fpType>
140static inline void
141vfpFlushToZero(FPSCR &fpscr, fpType &op1, fpType &op2)
142{
143 vfpFlushToZero(fpscr, op1);
144 vfpFlushToZero(fpscr, op2);
145}
146
147static inline uint32_t
148fpToBits(float fp)
149{
150 union
151 {
152 float fp;
153 uint32_t bits;
154 } val;

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190 } val;
191 val.bits = bits;
192 return val.fp;
193}
194
195typedef int VfpSavedState;
196
197static inline VfpSavedState
203prepVfpFpscr(FPSCR fpscr)
204{
205 int roundingMode = fegetround();
206 feclearexcept(FeAllExceptions);
207 switch (fpscr.rMode) {
208 case VfpRoundNearest:
209 fesetround(FeRoundNearest);
210 break;
211 case VfpRoundUpward:
212 fesetround(FeRoundUpward);
213 break;
214 case VfpRoundDown:
215 fesetround(FeRoundDown);
216 break;
217 case VfpRoundZero:
218 fesetround(FeRoundZero);
219 break;
220 }
221 return roundingMode;
222}
223
224static inline VfpSavedState
198prepFpState(uint32_t rMode)
199{
200 int roundingMode = fegetround();
201 feclearexcept(FeAllExceptions);
202 switch (rMode) {
203 case VfpRoundNearest:
204 fesetround(FeRoundNearest);
205 break;

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211 break;
212 case VfpRoundZero:
213 fesetround(FeRoundZero);
214 break;
215 }
216 return roundingMode;
217}
218
246static inline FPSCR
247setVfpFpscr(FPSCR fpscr, VfpSavedState state)
248{
249 int exceptions = fetestexcept(FeAllExceptions);
250 if (exceptions & FeInvalid) {
251 fpscr.ioc = 1;
252 }
253 if (exceptions & FeDivByZero) {
254 fpscr.dzc = 1;
255 }
256 if (exceptions & FeOverflow) {
257 fpscr.ofc = 1;
258 }
259 if (exceptions & FeUnderflow) {
260 fpscr.ufc = 1;
261 }
262 if (exceptions & FeInexact) {
263 fpscr.ixc = 1;
264 }
265 fesetround(state);
266 return fpscr;
267}
268
219static inline void
220finishVfp(FPSCR &fpscr, VfpSavedState state)
221{
222 int exceptions = fetestexcept(FeAllExceptions);
223 bool underflow = false;
224 if (exceptions & FeInvalid) {
225 fpscr.ioc = 1;
226 }

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