194a195,204
> template <class fpType>
> static bool
> isSnan(fpType val)
> {
> const bool single = (sizeof(fpType) == sizeof(float));
> const uint64_t qnan =
> single ? 0x7fc00000 : ULL(0x7ff8000000000000);
> return std::isnan(val) && ((fpToBits(val) & qnan) != qnan);
> }
>
198c208
< void finishVfp(FPSCR &fpscr, VfpSavedState state);
---
> void finishVfp(FPSCR &fpscr, VfpSavedState state, bool flush);
212,213c222,224
< float vcvtFpSFpH(FPSCR &fpscr, float op, float dest, bool top);
< float vcvtFpHFpS(FPSCR &fpscr, float op, bool top);
---
> uint16_t vcvtFpSFpH(FPSCR &fpscr, bool flush, bool defaultNan,
> uint32_t rMode, bool ahp, float op);
> float vcvtFpHFpS(FPSCR &fpscr, bool defaultNan, bool ahp, uint16_t op);
236,237c247,250
< float vfpUFixedToFpS(FPSCR fpscr, uint32_t val, bool half, uint8_t imm);
< float vfpSFixedToFpS(FPSCR fpscr, int32_t val, bool half, uint8_t imm);
---
> float vfpUFixedToFpS(bool flush, bool defaultNan,
> uint32_t val, bool half, uint8_t imm);
> float vfpSFixedToFpS(bool flush, bool defaultNan,
> int32_t val, bool half, uint8_t imm);
241,242c254,257
< double vfpUFixedToFpD(FPSCR fpscr, uint32_t val, bool half, uint8_t imm);
< double vfpSFixedToFpD(FPSCR fpscr, int32_t val, bool half, uint8_t imm);
---
> double vfpUFixedToFpD(bool flush, bool defaultNan,
> uint32_t val, bool half, uint8_t imm);
> double vfpSFixedToFpD(bool flush, bool defaultNan,
> int32_t val, bool half, uint8_t imm);
243a259,264
> float fprSqrtEstimate(FPSCR &fpscr, float op);
> uint32_t unsignedRSqrtEstimate(uint32_t op);
>
> float fpRecipEstimate(FPSCR &fpscr, float op);
> uint32_t unsignedRecipEstimate(uint32_t op);
>
314a336,395
> static inline float
> fpMaxS(float a, float b)
> {
> // Handle comparisons of +0 and -0.
> if (!std::signbit(a) && std::signbit(b))
> return a;
> return fmaxf(a, b);
> }
>
> static inline float
> fpMinS(float a, float b)
> {
> // Handle comparisons of +0 and -0.
> if (std::signbit(a) && !std::signbit(b))
> return a;
> return fminf(a, b);
> }
>
> static inline float
> fpRSqrtsS(float a, float b)
> {
> int fpClassA = std::fpclassify(a);
> int fpClassB = std::fpclassify(b);
> float aXb;
> int fpClassAxB;
>
> if ((fpClassA == FP_ZERO && fpClassB == FP_INFINITE) ||
> (fpClassA == FP_INFINITE && fpClassB == FP_ZERO)) {
> return 1.5;
> }
> aXb = a*b;
> fpClassAxB = std::fpclassify(aXb);
> if(fpClassAxB == FP_SUBNORMAL) {
> feraiseexcept(FeUnderflow);
> return 1.5;
> }
> return (3.0 - (a * b)) / 2.0;
> }
>
> static inline float
> fpRecpsS(float a, float b)
> {
> int fpClassA = std::fpclassify(a);
> int fpClassB = std::fpclassify(b);
> float aXb;
> int fpClassAxB;
>
> if ((fpClassA == FP_ZERO && fpClassB == FP_INFINITE) ||
> (fpClassA == FP_INFINITE && fpClassB == FP_ZERO)) {
> return 2.0;
> }
> aXb = a*b;
> fpClassAxB = std::fpclassify(aXb);
> if(fpClassAxB == FP_SUBNORMAL) {
> feraiseexcept(FeUnderflow);
> return 2.0;
> }
> return 2.0 - (a * b);
> }
>
366a448,452
> processNans(FPSCR &fpscr, bool &done, bool defaultNan,
> fpType op1, fpType op2) const;
>
> template <class fpType>
> fpType
369c455
< bool flush, uint32_t rMode) const;
---
> bool flush, bool defaultNan, uint32_t rMode) const;
447a534,554
> class FpRegRegRegImmOp : public FpOp
> {
> protected:
> IntRegIndex dest;
> IntRegIndex op1;
> IntRegIndex op2;
> uint64_t imm;
>
> FpRegRegRegImmOp(const char *mnem, ExtMachInst _machInst,
> OpClass __opClass, IntRegIndex _dest,
> IntRegIndex _op1, IntRegIndex _op2,
> uint64_t _imm, VfpMicroMode mode = VfpNotAMicroop) :
> FpOp(mnem, _machInst, __opClass),
> dest(_dest), op1(_op1), op2(_op2), imm(_imm)
> {
> setVfpMicroFlags(mode, flags);
> }
>
> std::string generateDisassembly(Addr pc, const SymbolTable *symtab) const;
> };
>